[Hexagon] Adding V4 bit manipulating instructions, removing ALU defs without encoding...

[oota-llvm.git] / test / MC / Disassembler / Hexagon / alu32_alu.txt

diff --git a/test/MC/Disassembler/Hexagon/alu32_alu.txt b/test/MC/Disassembler/Hexagon/alu32_alu.txt
index 3c2d4cd6932b3c41dc40bc33a521d8220ba75832..7fd40077929237f95376f65d0c3977cd44e7baf1 100644 (file)
--- a/test/MC/Disassembler/Hexagon/alu32_alu.txt
+++ b/test/MC/Disassembler/Hexagon/alu32_alu.txt
@@ -1,18 +1,44 @@
-# XFAIL: arm-windows
-# XFAIL: arm-linux
 # RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
 
+0xf1 0xc3 0x15 0xb0
+# CHECK: r17 = add(r21, #31)
 0x11 0xdf 0x15 0xf3
 # CHECK: r17 = add(r21, r31)
+0x11 0xdf 0x55 0xf6
+# CHECK: r17 = add(r21, r31):sat
+0xf1 0xc3 0x15 0x76
+# CHECK: r17 = and(r21, #31)
+0xf1 0xc3 0x95 0x76
+# CHECK: r17 = or(r21, #31)
 0x11 0xdf 0x15 0xf1
 # CHECK: r17 = and(r21, r31)
 0x11 0xdf 0x35 0xf1
 # CHECK: r17 = or(r21, r31)
 0x11 0xdf 0x75 0xf1
 # CHECK: r17 = xor(r21, r31)
+0x11 0xd5 0x9f 0xf1
+# CHECK: r17 = and(r21, ~r31)
+0x11 0xd5 0xbf 0xf1
+# CHECK: r17 = or(r21, ~r31)
+0x00 0xc0 0x00 0x7f
+# CHECK: nop
+0xb1 0xc2 0x5f 0x76
+# CHECK: r17 = sub(#21, r31)
 0x11 0xdf 0x35 0xf3
 # CHECK: r17 = sub(r31, r21)
+0x11 0xdf 0xd5 0xf6
+# CHECK: r17 = sub(r31, r21):sat
 0x11 0xc0 0xbf 0x70
 # CHECK: r17 = sxtb(r31)
+0x15 0xc0 0x31 0x72
+# CHECK: r17.h = #21
+0x15 0xc0 0x31 0x71
+# CHECK: r17.l = #21
+0xf1 0xff 0x5f 0x78
+# CHECK: r17 = #32767
+0xf1 0xff 0xdf 0x78
+# CHECK: r17 = ##65535
+0x11 0xc0 0x75 0x70
+# CHECK: r17 = r21
 0x11 0xc0 0xd5 0x70
 # CHECK: r17 = zxth(r21)