[Hexagon] Adding V4 bit manipulating instructions, removing ALU defs without encoding...

[oota-llvm.git] / test / MC / Disassembler / Hexagon / alu32_alu.txt

diff --git a/test/MC/Disassembler/Hexagon/alu32_alu.txt b/test/MC/Disassembler/Hexagon/alu32_alu.txt
index 4ae3f9693e0f2a32291f701fe6b3a98750ca7e6c..7fd40077929237f95376f65d0c3977cd44e7baf1 100644 (file)
--- a/test/MC/Disassembler/Hexagon/alu32_alu.txt
+++ b/test/MC/Disassembler/Hexagon/alu32_alu.txt
@@ -6,16 +6,20 @@
 # CHECK: r17 = add(r21, r31)
 0x11 0xdf 0x55 0xf6
 # CHECK: r17 = add(r21, r31):sat
-0x11 0xdf 0x15 0xf1
-# CHECK: r17 = and(r21, r31)
 0xf1 0xc3 0x15 0x76
 # CHECK: r17 = and(r21, #31)
-0x11 0xdf 0x35 0xf1
-# CHECK: r17 = or(r21, r31)
 0xf1 0xc3 0x95 0x76
 # CHECK: r17 = or(r21, #31)
+0x11 0xdf 0x15 0xf1
+# CHECK: r17 = and(r21, r31)
+0x11 0xdf 0x35 0xf1
+# CHECK: r17 = or(r21, r31)
 0x11 0xdf 0x75 0xf1
 # CHECK: r17 = xor(r21, r31)
+0x11 0xd5 0x9f 0xf1
+# CHECK: r17 = and(r21, ~r31)
+0x11 0xd5 0xbf 0xf1
+# CHECK: r17 = or(r21, ~r31)
 0x00 0xc0 0x00 0x7f
 # CHECK: nop
 0xb1 0xc2 0x5f 0x76
@@ -31,10 +35,10 @@
 0x15 0xc0 0x31 0x71
 # CHECK: r17.l = #21
 0xf1 0xff 0x5f 0x78
-# CHECK: { r17 = #32767 }
+# CHECK: r17 = #32767
 0xf1 0xff 0xdf 0x78
-# CHECK: { r17 = #-1 }
+# CHECK: r17 = ##65535
 0x11 0xc0 0x75 0x70
-# CHECK: { r17 = r21 }
+# CHECK: r17 = r21
 0x11 0xc0 0xd5 0x70
 # CHECK: r17 = zxth(r21)