Revert "[LSR] Generate and use zero extends"

[oota-llvm.git] / test / MC / Disassembler / Hexagon / system_user.txt

diff --git a/test/MC/Disassembler/Hexagon/system_user.txt b/test/MC/Disassembler/Hexagon/system_user.txt
index 51d082a9e180344348a5a5500358aa46dccc2165..d55a94e939b54666eddd1ba1d2b5dbde20b1ab87 100644 (file)
--- a/test/MC/Disassembler/Hexagon/system_user.txt
+++ b/test/MC/Disassembler/Hexagon/system_user.txt
@@ -1,12 +1,26 @@
-# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -disassemble < %s | FileCheck %s
+# Hexagon Programmer's Reference Manual 11.9.1 SYSTEM/USER
 
+# Load locked
 0x11 0xc0 0x15 0x92
 # CHECK: r17 = memw_locked(r21)
 0x10 0xd0 0x15 0x92
 # CHECK: r17:16 = memd_locked(r21)
+
+# Store conditional
+0x03 0xd5 0xb1 0xa0
+# CHECK: memw_locked(r17, p3) = r21
+0x03 0xd4 0xf1 0xa0
+# CHECK: memd_locked(r17, p3) = r21:20
+
+# Memory barrier
 0x00 0xc0 0x00 0xa8
 # CHECK: barrier
+
+# Data cache prefetch
 0x15 0xc0 0x11 0x94
 # CHECK: dcfetch(r17 + #168)
+
+# Send value to ETM trace
 0x00 0xc0 0x51 0x62
 # CHECK: trace(r17)