ARM64: print lsr instead of lsrv for variable shifts (etc)

[oota-llvm.git] / test / MC / Disassembler / Mips / mips32.txt

diff --git a/test/MC/Disassembler/Mips/mips32.txt b/test/MC/Disassembler/Mips/mips32.txt
index 5c2d5ca4768e7ba16dd99ec4af2582e7c3eb74c9..bfb145e39596a270c2ca3cbcfa26a6083ac17a26 100644 (file)
--- a/test/MC/Disassembler/Mips/mips32.txt
+++ b/test/MC/Disassembler/Mips/mips32.txt
@@ -35,9 +35,15 @@
 # CHECK: bc1f 1332
 0x45 0x00 0x01 0x4c
 
+# CHECK: bc1f $fcc7, 1332
+0x45 0x1c 0x01 0x4c
+
 # CHECK: bc1t 1332
 0x45 0x01 0x01 0x4c
 
+# CHECK: bc1t $fcc7, 1332
+0x45 0x1d 0x01 0x4c
+
 # CHECK: beq $9, $6, 1332
 0x11 0x26 0x01 0x4c
 
@@ -158,8 +164,8 @@
 # CHECK: ceil.w.s $f6, $f7
 0x46 0x00 0x39 0x8e
 
-# CHECK: cfc1  $6, $fcc0
-0x44 0x46 0x08 0x00
+# CHECK: cfc1  $6, $7
+0x44 0x46 0x38 0x00
 
 # CHECK: clo  $6, $7
 0x70 0xe6 0x30 0x21
@@ -167,8 +173,8 @@
 # CHECK: clz  $6, $7
 0x70 0xe6 0x30 0x20
 
-# CHECK: ctc1  $6, $fcc0
-0x44 0xc6 0x08 0x00
+# CHECK: ctc1  $6, $7
+0x44 0xc6 0x38 0x00
 
 # CHECK: cvt.d.s $f6, $f7
 0x46 0x00 0x39 0xa1
@@ -200,6 +206,9 @@
 # CHECK: jal 1328
 0x0c 0x00 0x01 0x4c
 
+# CHECK: jalx 1328
+0x74 0x00 0x01 0x4c
+
 # CHECK: jalr  $7
 0x00 0xe0 0xf8 0x09
 
@@ -260,6 +269,24 @@
 # CHECK: mov.s $f6, $f7
 0x46 0x00 0x39 0x86
 
+# CHECK: movf $3, $2, $fcc7
+0x00,0x5c,0x18,0x01
+
+# CHECK: movf.d $f4, $f2, $fcc7
+0x46,0x3c,0x11,0x11
+
+# CHECK: movf.s $f4, $f2, $fcc7
+0x46,0x1c,0x11,0x11
+
+# CHECK: movt $3, $2, $fcc7
+0x00,0x5d,0x18,0x01
+
+# CHECK: movt.d $f4, $f2, $fcc7
+0x46,0x3d,0x11,0x11
+
+# CHECK: movt.s $f4, $f2, $fcc7
+0x46,0x1d,0x11,0x11
+
 # CHECK: msub   $6,  $7
 0x70 0xc7 0x00 0x04