[mips] [IAS] Slightly improve shift instruction generation in expandLoadImm.

[oota-llvm.git] / test / MC / ELF / cfi-rel-offset.s

diff --git a/test/MC/ELF/cfi-rel-offset.s b/test/MC/ELF/cfi-rel-offset.s
index 35a73efb0f4ae3285e4d6ae118e8de62f9177a7f..892cda165ba6b67333915c9db36fb162e21e7b90 100644 (file)
--- a/test/MC/ELF/cfi-rel-offset.s
+++ b/test/MC/ELF/cfi-rel-offset.s
@@ -15,8 +15,8 @@ f:
        .cfi_endproc
 
 // CHECK:        Section {
-// CHECK:          Index: 4
-// CHECK-NEXT:     Name: .eh_frame
+// CHECK:          Index:
+// CHECK:          Name: .eh_frame
 // CHECK-NEXT:     Type: SHT_PROGBITS
 // CHECK-NEXT:     Flags [
 // CHECK-NEXT:       SHF_ALLOC
@@ -29,7 +29,6 @@ f:
 // CHECK-NEXT:     AddressAlignment: 8
 // CHECK-NEXT:     EntrySize: 0
 // CHECK-NEXT:     Relocations [
-// CHECK-NEXT:       0x20 R_X86_64_PC32 .text 0x0
 // CHECK-NEXT:     ]
 // CHECK-NEXT:     SectionData (
 // CHECK-NEXT:       0000: 14000000 00000000 017A5200 01781001
@@ -39,18 +38,19 @@ f:
 // CHECK-NEXT:     )
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Section {
-// CHECK-NEXT:     Index: 5
+// CHECK-NEXT:     Index:
 // CHECK-NEXT:     Name: .rela.eh_frame
 // CHECK-NEXT:     Type: SHT_RELA
 // CHECK-NEXT:     Flags [
 // CHECK-NEXT:     ]
 // CHECK-NEXT:     Address: 0x0
-// CHECK-NEXT:     Offset: 0x3A0
+// CHECK-NEXT:     Offset:
 // CHECK-NEXT:     Size: 24
-// CHECK-NEXT:     Link: 7
-// CHECK-NEXT:     Info: 4
+// CHECK-NEXT:     Link:
+// CHECK-NEXT:     Info:
 // CHECK-NEXT:     AddressAlignment: 8
 // CHECK-NEXT:     EntrySize: 24
 // CHECK-NEXT:     Relocations [
+// CHECK-NEXT:       0x20 R_X86_64_PC32 .text 0x0
 // CHECK-NEXT:     ]
 // CHECK:        }