Add OpSize16 bit, for instructions which need 0x66 prefix in 16-bit mode

[oota-llvm.git] / test / MC / Mips / elf-reginfo.ll

diff --git a/test/MC/Mips/elf-reginfo.ll b/test/MC/Mips/elf-reginfo.ll
index 1d7a18866c503047666331ddd0f87262f3f2d0bc..a255af931d8339d0e5f898d67481dee560481eb1 100644 (file)
--- a/test/MC/Mips/elf-reginfo.ll
+++ b/test/MC/Mips/elf-reginfo.ll
@@ -1,7 +1,7 @@
  ; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 %s -o - \
- ; RUN: | elf-dump --dump-section-data  | FileCheck --check-prefix=CHECK_64 %s
+ ; RUN: | llvm-readobj -s | FileCheck --check-prefix=CHECK_64 %s
  ; RUN: llc -filetype=obj -march=mipsel -mcpu=mips32 %s -o - \
- ; RUN: | elf-dump --dump-section-data  | FileCheck --check-prefix=CHECK_32 %s
+ ; RUN: | llvm-readobj -s | FileCheck --check-prefix=CHECK_32 %s
 
 ; Check for register information sections.
 ;
@@ -13,14 +13,18 @@ entry:
 ; Check that the appropriate relocations were created.
 
 ; check for .MIPS.options
-; CHECK_64:      (('sh_name', 0x{{[0-9|a-f]+}}) # '.MIPS.options'
-; CHECK_64-NEXT: ('sh_type', 0x7000000d)
-; CHECK_64-NEXT: ('sh_flags', 0x0000000008000002)
+; CHECK_64:      Sections [
+; CHECK_64:        Section {
+; CHECK_64:          Name: .MIPS.options
+; CHECK_64-NEXT:     Type: SHT_MIPS_OPTIONS
+; CHECK_64-NEXT:     Flags [ (0x8000002)
 
 ; check for .reginfo
-; CHECK_32:      (('sh_name', 0x{{[0-9|a-f]+}}) # '.reginfo'
-; CHECK_32-NEXT: ('sh_type', 0x70000006)
-; CHECK_32-NEXT: ('sh_flags', 0x00000002)
+; CHECK_32:      Sections [
+; CHECK_32:        Section {
+; CHECK_32:          Name: .reginfo
+; CHECK_32-NEXT:     Type:  SHT_MIPS_REGINFO
+; CHECK_32-NEXT:     Flags [ (0x2)
 
 
   %puts = tail call i32 @puts(i8* getelementptr inbounds ([12 x i8]* @str, i64 0, i64 0))
@@ -28,4 +32,3 @@ entry:
 
 }
 declare i32 @puts(i8* nocapture) nounwind
-