Add OpSize16 bit, for instructions which need 0x66 prefix in 16-bit mode

[oota-llvm.git] / test / MC / Mips / micromips-alu-instructions.s

diff --git a/test/MC/Mips/micromips-alu-instructions.s b/test/MC/Mips/micromips-alu-instructions.s
index bd5cdd3ba86233827f3ca6329d2c458717b9b355..276a83e82c03ec32231388d8c7a51a7eab13f3d3 100644 (file)
--- a/test/MC/Mips/micromips-alu-instructions.s
+++ b/test/MC/Mips/micromips-alu-instructions.s
@@ -23,6 +23,7 @@
 # CHECK-EL: slti   $3, $3, 103    # encoding: [0x63,0x90,0x67,0x00]
 # CHECK-EL: sltiu  $3, $3, 103    # encoding: [0x63,0xb0,0x67,0x00]
 # CHECK-EL: sltu   $3, $3, $5     # encoding: [0xa3,0x00,0x90,0x1b]
+# CHECK-EL: lui    $9, 17767      # encoding: [0xa9,0x41,0x67,0x45]
 # CHECK-EL: and    $9, $6, $7     # encoding: [0xe6,0x00,0x50,0x4a]
 # CHECK-EL: andi   $9, $6, 17767  # encoding: [0x26,0xd1,0x67,0x45]
 # CHECK-EL: andi   $9, $6, 17767  # encoding: [0x26,0xd1,0x67,0x45]
@@ -57,6 +58,7 @@
 # CHECK-EB: slti  $3, $3, 103     # encoding: [0x90,0x63,0x00,0x67]
 # CHECK-EB: sltiu $3, $3, 103     # encoding: [0xb0,0x63,0x00,0x67]
 # CHECK-EB: sltu  $3, $3, $5      # encoding: [0x00,0xa3,0x1b,0x90]
+# CHECK-EB: lui $9, 17767         # encoding: [0x41,0xa9,0x45,0x67]
 # CHECK-EB: and $9, $6, $7        # encoding: [0x00,0xe6,0x4a,0x50]
 # CHECK-EB:  andi  $9, $6, 17767  # encoding: [0xd1,0x26,0x45,0x67]
 # CHECK-EB:  andi  $9, $6, 17767  # encoding: [0xd1,0x26,0x45,0x67]
@@ -88,6 +90,7 @@
     slti   $3, $3, 103
     sltiu  $3, $3, 103
     sltu   $3, $3, $5
+    lui    $9, 17767
     and    $9, $6, $7
     and    $9, $6, 17767
     andi   $9, $6, 17767