Add OpSize16 bit, for instructions which need 0x66 prefix in 16-bit mode

[oota-llvm.git] / test / MC / Mips / sext_64_32.ll

diff --git a/test/MC/Mips/sext_64_32.ll b/test/MC/Mips/sext_64_32.ll
index bc0b5b184fd7248c00695a53273b26372b978e1e..9e0cfa01fdfca7cd3b53e2327ca335575b61f3c3 100644 (file)
--- a/test/MC/Mips/sext_64_32.ll
+++ b/test/MC/Mips/sext_64_32.ll
@@ -2,14 +2,19 @@
 
 ; Sign extend from 32 to 64 was creating nonsense opcodes
 
-; CHECK: sll ${{[0-9]+}}, ${{[0-9]+}}, 0
-
-; ModuleID = '../sext.c'
-;target datalayout = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v64:64:64-n32"
-;target triple = "mips64el-unknown-linux"
+; CHECK: sll ${{[a-z0-9]+}}, ${{[a-z0-9]+}}, 0
 
 define i64 @foo(i32 %ival) nounwind readnone {
 entry:
   %conv = sext i32 %ival to i64
   ret i64 %conv
 }
+
+; CHECK: dsll32 ${{[a-z0-9]+}}, ${{[a-z0-9]+}}, 0
+
+define i64 @foo_2(i32 %ival_2) nounwind readnone {
+entry:
+  %conv_2 = zext i32 %ival_2 to i64
+  ret i64 %conv_2
+}
+