-; RUN: opt < %s -basicaa -gvn -S -die | FileCheck %s
-
-; 32-bit little endian target.
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
+; RUN: opt < %s -default-data-layout="e-p:32:32:32-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-n8:16:32" -basicaa -gvn -S -die | FileCheck %s
+; RUN: opt < %s -default-data-layout="E-p:32:32:32-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-n32" -basicaa -gvn -S -die | FileCheck %s
;; Trivial RLE test.
define i32 @test0(i32 %V, i32* %P) {
%A = load i32* %P
ret i32 %A
-; CHECK: @test0
+; CHECK-LABEL: @test0(
; CHECK: ret i32 %V
}
ret i8 %Y
}
+;; No PR filed, crashed in CaptureTracker.
+declare void @helper()
+define void @crash1() {
+ tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* undef, i8* undef, i64 undef, i32 1, i1 false) nounwind
+ %tmp = load i8* bitcast (void ()* @helper to i8*)
+ %x = icmp eq i8 %tmp, 15
+ ret void
+}
+
;;===----------------------------------------------------------------------===;;
;; Store -> Load and Load -> Load forwarding where src and dst are different
%A = load float* %P2
ret float %A
-; CHECK: @coerce_mustalias1
+; CHECK-LABEL: @coerce_mustalias1(
; CHECK-NOT: load
; CHECK: ret float
}
%A = load float* %P2
ret float %A
-; CHECK: @coerce_mustalias2
+; CHECK-LABEL: @coerce_mustalias2(
; CHECK-NOT: load
; CHECK: ret float
}
%A = load i32** %P2
ret i32* %A
-; CHECK: @coerce_mustalias3
+; CHECK-LABEL: @coerce_mustalias3(
; CHECK-NOT: load
; CHECK: ret i32*
}
%X = bitcast i32 %A to float
ret float %X
-; CHECK: @coerce_mustalias4
+; CHECK-LABEL: @coerce_mustalias4(
; CHECK: %A = load i32* %P
; CHECK-NOT: load
; CHECK: ret float
%A = load i8* %P2
ret i8 %A
-; CHECK: @coerce_mustalias5
+; CHECK-LABEL: @coerce_mustalias5(
; CHECK-NOT: load
; CHECK: ret i8
}
%A = load float* %P2
ret float %A
-; CHECK: @coerce_mustalias6
+; CHECK-LABEL: @coerce_mustalias6(
; CHECK-NOT: load
; CHECK: ret float
}
%A = load i8** %P2
ret i8* %A
-; CHECK: @coerce_mustalias7
+; CHECK-LABEL: @coerce_mustalias7(
; CHECK-NOT: load
; CHECK: ret i8*
}
%arrayidx = getelementptr inbounds i16* %A, i64 42
%tmp2 = load i16* %arrayidx
ret i16 %tmp2
-; CHECK: @memset_to_i16_local
+; CHECK-LABEL: @memset_to_i16_local(
; CHECK-NOT: load
; CHECK: ret i16 257
}
%arrayidx = getelementptr inbounds float* %A, i64 42 ; <float*> [#uses=1]
%tmp2 = load float* %arrayidx ; <float> [#uses=1]
ret float %tmp2
-; CHECK: @memset_to_float_local
+; CHECK-LABEL: @memset_to_float_local(
; CHECK-NOT: load
; CHECK: zext
; CHECK-NEXT: shl
%A = load i16* %P2
ret i16 %A
-; CHECK: @memset_to_i16_nonlocal0
+; CHECK-LABEL: @memset_to_i16_nonlocal0(
; CHECK: Cont:
; CHECK-NEXT: %A = phi i16 [ 514, %F ], [ 257, %T ]
; CHECK-NOT: load
}
@GCst = constant {i32, float, i32 } { i32 42, float 14., i32 97 }
+@GCst_as1 = addrspace(1) constant {i32, float, i32 } { i32 42, float 14., i32 97 }
; memset -> float forwarding.
define float @memcpy_to_float_local(float* %A) nounwind ssp {
%arrayidx = getelementptr inbounds float* %A, i64 1 ; <float*> [#uses=1]
%tmp2 = load float* %arrayidx ; <float> [#uses=1]
ret float %tmp2
-; CHECK: @memcpy_to_float_local
+; CHECK-LABEL: @memcpy_to_float_local(
; CHECK-NOT: load
; CHECK: ret float 1.400000e+01
}
-
+; memcpy from address space 1
+define float @memcpy_to_float_local_as1(float* %A) nounwind ssp {
+entry:
+ %conv = bitcast float* %A to i8* ; <i8*> [#uses=1]
+ tail call void @llvm.memcpy.p0i8.p1i8.i64(i8* %conv, i8 addrspace(1)* bitcast ({i32, float, i32 } addrspace(1)* @GCst_as1 to i8 addrspace(1)*), i64 12, i32 1, i1 false)
+ %arrayidx = getelementptr inbounds float* %A, i64 1 ; <float*> [#uses=1]
+ %tmp2 = load float* %arrayidx ; <float> [#uses=1]
+ ret float %tmp2
+; CHECK-LABEL: @memcpy_to_float_local_as1(
+; CHECK-NOT: load
+; CHECK: ret float 1.400000e+01
+}
;; non-local i32/float -> i8 load forwarding.
define i8 @coerce_mustalias_nonlocal0(i32* %P, i1 %cond) {
%A = load i8* %P3
ret i8 %A
-; CHECK: @coerce_mustalias_nonlocal0
+; CHECK-LABEL: @coerce_mustalias_nonlocal0(
; CHECK: Cont:
; CHECK: %A = phi i8 [
; CHECK-NOT: load
%A = load i8* %P3
ret i8 %A
-;; FIXME: This is disabled because this caused a miscompile in the llvm-gcc
-;; bootstrap, see r82411
-;
-; HECK: @coerce_mustalias_nonlocal1
-; HECK: Cont:
-; HECK: %A = phi i8 [
-; HECK-NOT: load
-; HECK: ret i8 %A
+; CHECK-LABEL: @coerce_mustalias_nonlocal1(
+; CHECK: Cont:
+; CHECK: %A = phi i8 [
+; CHECK-NOT: load
+; CHECK: ret i8 %A
}
%A = load i8* %P3
ret i8 %A
-; CHECK: @coerce_mustalias_pre0
+; CHECK-LABEL: @coerce_mustalias_pre0(
; CHECK: F:
; CHECK: load i8* %P3
; CHECK: Cont:
%A = load i8* %P3
ret i8 %A
-; CHECK: @coerce_offset0
+; CHECK-LABEL: @coerce_offset0(
; CHECK-NOT: load
; CHECK: ret i8
}
%P4 = getelementptr i8* %P3, i32 2
br i1 %cond, label %T, label %F
T:
- store i32 42, i32* %P
+ store i32 57005, i32* %P
br label %Cont
F:
%A = load i8* %P4
ret i8 %A
-; CHECK: @coerce_offset_nonlocal0
+; CHECK-LABEL: @coerce_offset_nonlocal0(
; CHECK: Cont:
; CHECK: %A = phi i8 [
; CHECK-NOT: load
%A = load i8* %P4
ret i8 %A
-; CHECK: @coerce_offset_pre0
+; CHECK-LABEL: @coerce_offset_pre0(
; CHECK: F:
; CHECK: load i8* %P4
; CHECK: Cont:
; CHECK: ret i8 %A
}
-define i32 @chained_load(i32** %p) {
+define i32 @chained_load(i32** %p, i32 %x, i32 %y) {
block1:
%A = alloca i32*
%z = load i32** %p
store i32* %z, i32** %A
- br i1 true, label %block2, label %block3
+ %cmp = icmp eq i32 %x, %y
+ br i1 %cmp, label %block2, label %block3
block2:
%a = load i32** %p
%d = load i32* %c
ret i32 %d
-; CHECK: @chained_load
+; CHECK-LABEL: @chained_load(
; CHECK: %z = load i32** %p
; CHECK-NOT: load
; CHECK: %d = load i32* %z
declare i1 @cond2() readonly
define i32 @phi_trans2() {
-; CHECK: @phi_trans2
+; CHECK-LABEL: @phi_trans2(
entry:
%P = alloca i32, i32 400
br label %F1
ret i32 0
}
-define i32 @phi_trans3(i32* %p) {
-; CHECK: @phi_trans3
+define i32 @phi_trans3(i32* %p, i32 %x, i32 %y, i32 %z) {
+; CHECK-LABEL: @phi_trans3(
block1:
- br i1 true, label %block2, label %block3
+ %cmpxy = icmp eq i32 %x, %y
+ br i1 %cmpxy, label %block2, label %block3
block2:
store i32 87, i32* %p
block4:
%A = phi i32 [-1, %block2], [42, %block3]
- br i1 true, label %block5, label %exit
+ br i1 %cmpxy, label %block5, label %exit
; CHECK: block4:
; CHECK-NEXT: %D = phi i32 [ 87, %block2 ], [ 97, %block3 ]
block5:
%B = add i32 %A, 1
- br i1 true, label %block6, label %exit
+ br i1 %cmpxy, label %block6, label %exit
block6:
%C = getelementptr i32* %p, i32 %B
- br i1 true, label %block7, label %exit
+ br i1 %cmpxy, label %block7, label %exit
block7:
%D = load i32* %C
}
define i8 @phi_trans4(i8* %p) {
-; CHECK: @phi_trans4
+; CHECK-LABEL: @phi_trans4(
entry:
%X3 = getelementptr i8* %p, i32 192
store i8 192, i8* %X3
}
define i8 @phi_trans5(i8* %p) {
-; CHECK: @phi_trans5
+; CHECK-LABEL: @phi_trans5(
entry:
%X4 = getelementptr i8* %p, i32 2
%arraydecay = getelementptr inbounds [256 x i32]* %x, i32 0, i32 0 ; <i32*>
%tmp1 = load i32* %arraydecay ; <i32> [#uses=1]
ret i32 %tmp1
-; CHECK: @memset_to_load
+; CHECK-LABEL: @memset_to_load(
; CHECK: ret i32 0
}
%add = add nsw i32 %tmp2, %conv
ret i32 %add
-; TEMPORARILYDISABLED: @load_load_partial_alias
+; TEMPORARILYDISABLED-LABEL: @load_load_partial_alias(
; TEMPORARILYDISABLED: load i32*
; TEMPORARILYDISABLED-NOT: load
; TEMPORARILYDISABLED: lshr i32 {{.*}}, 8
if.end:
ret i32 52
-; TEMPORARILY_DISABLED: @load_load_partial_alias_cross_block
+; TEMPORARILY_DISABLED-LABEL: @load_load_partial_alias_cross_block(
; TEMPORARILY_DISABLED: land.lhs.true:
; TEMPORARILY_DISABLED-NOT: load i8
; TEMPORARILY_DISABLED: ret i32 %conv6
%conv2 = zext i8 %tmp1 to i32
%add = add nsw i32 %conv, %conv2
ret i32 %add
-; CHECK: @test_widening1
+; CHECK-LABEL: @test_widening1(
; CHECK-NOT: load
; CHECK: load i16*
; CHECK-NOT: load
-; CHECK-ret i32
+; CHECK: ret i32
}
define i32 @test_widening2() nounwind ssp noredzone {
%add3 = add nsw i32 %add2, %conv3
ret i32 %add3
-; CHECK: @test_widening2
+; CHECK-LABEL: @test_widening2(
; CHECK-NOT: load
; CHECK: load i32*
; CHECK-NOT: load
-; CHECK-ret i32
+; CHECK: ret i32
}
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
+declare void @llvm.memcpy.p0i8.p1i8.i64(i8* nocapture, i8 addrspace(1)* nocapture, i64, i32, i1) nounwind
+
;;===----------------------------------------------------------------------===;;
;; Load -> Store dependency which isn't interfered with by a call that happens