Add test cases for PRE w/volatile loads

[oota-llvm.git] / test / Transforms / IndVarSimplify / indirectbr.ll

diff --git a/test/Transforms/IndVarSimplify/indirectbr.ll b/test/Transforms/IndVarSimplify/indirectbr.ll
index b4ce153244af997b6082d5526e3f9b007b816ff1..a208ded22ed11cfaa3317b096ed85ee2cf44bcec 100644 (file)
--- a/test/Transforms/IndVarSimplify/indirectbr.ll
+++ b/test/Transforms/IndVarSimplify/indirectbr.ll
@@ -1,6 +1,6 @@
 ; RUN: opt < %s -indvars -S -disable-output
-; PR5758
 
+; PR5758
 define zeroext i1 @foo() nounwind {
 entry:
   indirectbr i8* undef, [label %"202", label %"133"]
@@ -20,3 +20,20 @@ entry:
 "202":                                            ; preds = %entry
   ret i1 false
 }
+
+; PR7333
+define void @__atomvec_module__put_vrml_bonds() nounwind {
+bb7.preheader:                                    ; preds = %entry
+  indirectbr i8* undef, [label %bb14, label %bb16]
+
+bb14:                                             ; preds = %bb14, %bb7.preheader
+  br label %bb16
+
+bb16:                                             ; preds = %bb16, %bb14, %bb7.preheader
+  %S.31.0 = phi i64 [ %3, %bb16 ], [ 1, %bb7.preheader ], [ 1, %bb14 ] ; <i64> [#uses=2]
+  %0 = add nsw i64 %S.31.0, -1                    ; <i64> [#uses=1]
+  %1 = getelementptr inbounds [3 x double]* undef, i64 0, i64 %0 ; <double*> [#uses=1]
+  %2 = load double* %1, align 8                   ; <double> [#uses=0]
+  %3 = add nsw i64 %S.31.0, 1                     ; <i64> [#uses=1]
+  br label %bb16
+}