%a = and i1 %X, %Y
%b = and i1 %a, %X
ret i1 %b
-; CHECK: @test2
+; CHECK-LABEL: @test2(
; CHECK-NEXT: and i1 %X, %Y
; CHECK-NEXT: ret
}
%a = and i32 %X, %Y
%b = and i32 %Y, %a
ret i32 %b
-; CHECK: @test3
+; CHECK-LABEL: @test3(
; CHECK-NEXT: and i32 %X, %Y
; CHECK-NEXT: ret
}
%b = icmp slt i32 %X, 0
%c = and i1 %a, %b
ret i1 %c
-; CHECK: @test4
+; CHECK-LABEL: @test4(
; CHECK-NEXT: ret i1 false
}
%2 = and <4 x i32> <i32 1, i32 2, i32 3, i32 4>, %1
ret <4 x i32> %2
}
+
+; Check that we combine "if x!=0 && x!=-1" into "if x+1u>1"
+define i32 @test6(i64 %x) nounwind {
+; CHECK-LABEL: @test6(
+; CHECK-NEXT: add i64 %x, 1
+; CHECK-NEXT: icmp ugt i64 %x.off, 1
+ %cmp1 = icmp ne i64 %x, -1
+ %not.cmp = icmp ne i64 %x, 0
+ %.cmp1 = and i1 %cmp1, %not.cmp
+ %land.ext = zext i1 %.cmp1 to i32
+ ret i32 %land.ext
+}
+
+define i1 @test7(i32 %i, i1 %b) {
+; CHECK-LABEL: @test7(
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %i, 0
+; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP]], %b
+; CHECK-NEXT: ret i1 [[AND]]
+ %cmp1 = icmp slt i32 %i, 1
+ %cmp2 = icmp sgt i32 %i, -1
+ %and1 = and i1 %cmp1, %b
+ %and2 = and i1 %and1, %cmp2
+ ret i1 %and2
+}
+
+define i1 @test8(i32 %i) {
+; CHECK-LABEL: @test8(
+; CHECK-NEXT: [[DEC:%.*]] = add i32 %i, -1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[DEC]], 13
+; CHECK-NEXT: ret i1 [[CMP]]
+ %cmp1 = icmp ne i32 %i, 0
+ %cmp2 = icmp ult i32 %i, 14
+ %cond = and i1 %cmp1, %cmp2
+ ret i1 %cond
+}