This implements the second half of the fix for PR3290, handling

[oota-llvm.git] / test / Transforms / InstCombine / rem.ll

diff --git a/test/Transforms/InstCombine/rem.ll b/test/Transforms/InstCombine/rem.ll
index 7f62bd2c5964cdd2606dad6fc4c07f29b82fe74f..8b2263d9b23f882fa45e579736862a99effe6233 100644 (file)
--- a/test/Transforms/InstCombine/rem.ll
+++ b/test/Transforms/InstCombine/rem.ll
@@ -1,15 +1,83 @@
 ; This test makes sure that these instructions are properly eliminated.
 ;
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep rem
+; END.
 
-; RUN: if as < %s | opt -instcombine -dce | dis | grep rem
-; RUN: then exit 1
-; RUN: else exit 0
-; RUN: fi
+define i32 @test1(i32 %A) {
+       %B = srem i32 %A, 1     ; ISA constant 0
+       ret i32 %B
+}
+
+define i32 @test2(i32 %A) {    ; 0 % X = 0, we don't need to preserve traps
+       %B = srem i32 0, %A
+       ret i32 %B
+}
 
-implementation
+define i32 @test3(i32 %A) {
+       %B = urem i32 %A, 8
+       ret i32 %B
+}
+
+define i1 @test3a(i32 %A) {
+       %B = srem i32 %A, -8
+       %C = icmp ne i32 %B, 0
+       ret i1 %C
+}
 
-int "test1"(int %A) {
-       %B = rem int %A, 1    ; ISA constant 0
-       ret int %B
+define i32 @test4(i32 %X, i1 %C) {
+       %V = select i1 %C, i32 1, i32 8
+       %R = urem i32 %X, %V
+       ret i32 %R
 }
 
+define i32 @test5(i32 %X, i8 %B) {
+       %shift.upgrd.1 = zext i8 %B to i32
+       %Amt = shl i32 32, %shift.upgrd.1
+       %V = urem i32 %X, %Amt
+       ret i32 %V
+}
+
+define i32 @test6(i32 %A) {
+       %B = srem i32 %A, 0     ;; undef
+       ret i32 %B
+}
+
+define i32 @test7(i32 %A) {
+       %B = mul i32 %A, 8
+       %C = srem i32 %B, 4
+       ret i32 %C
+}
+
+define i32 @test8(i32 %A) {
+       %B = shl i32 %A, 4
+       %C = srem i32 %B, 8
+       ret i32 %C
+}
+
+define i32 @test9(i32 %A) {
+       %B = mul i32 %A, 64
+       %C = urem i32 %B, 32
+       ret i32 %C
+}
+
+define i32 @test10(i8 %c) {
+       %tmp.1 = zext i8 %c to i32
+       %tmp.2 = mul i32 %tmp.1, 4
+       %tmp.3 = sext i32 %tmp.2 to i64
+       %tmp.5 = urem i64 %tmp.3, 4
+       %tmp.6 = trunc i64 %tmp.5 to i32
+       ret i32 %tmp.6
+}
+
+define i32 @test11(i32 %i) {
+       %tmp.1 = and i32 %i, -2
+       %tmp.3 = mul i32 %tmp.1, 2
+       %tmp.5 = urem i32 %tmp.3, 4
+       ret i32 %tmp.5
+}
+
+define i32 @test12(i32 %i) {
+       %tmp.1 = and i32 %i, -4
+       %tmp.5 = srem i32 %tmp.1, 2
+       ret i32 %tmp.5
+}