[x86] Fix disassembly of callw instruction

[oota-llvm.git] / test / Transforms / InstCombine / shift-sra.ll

diff --git a/test/Transforms/InstCombine/shift-sra.ll b/test/Transforms/InstCombine/shift-sra.ll
index 58f322635c255df78aa547599f58933812d7e5cf..75235500d5136891e5e82f82903dc0adc9b84c9e 100644 (file)
--- a/test/Transforms/InstCombine/shift-sra.ll
+++ b/test/Transforms/InstCombine/shift-sra.ll
@@ -7,7 +7,7 @@ define i32 @test1(i32 %X, i8 %A) {
         %Y = ashr i32 %X, %shift.upgrd.1                ; <i32> [#uses=1]
         %Z = and i32 %Y, 1              ; <i32> [#uses=1]
         ret i32 %Z
-; CHECK: @test1
+; CHECK-LABEL: @test1(
 ; CHECK: lshr i32 %X, %shift.upgrd.1 
 }
 
@@ -16,7 +16,7 @@ define i32 @test2(i8 %tmp) {
         %tmp4 = add i32 %tmp3, 7                ; <i32> [#uses=1]
         %tmp5 = ashr i32 %tmp4, 3               ; <i32> [#uses=1]
         ret i32 %tmp5
-; CHECK: @test2
+; CHECK-LABEL: @test2(
 ; CHECK: lshr i32 %tmp4, 3
 }
 
@@ -33,7 +33,7 @@ C:
   %S = ashr i64 %P, 12
   ret i64 %S
   
-; CHECK: @test3
+; CHECK-LABEL: @test3(
 ; CHECK: %P = phi i64
 ; CHECK-NEXT: ret i64 %P
 }
@@ -52,7 +52,27 @@ C:
   %S = ashr i64 %R, 12
   ret i64 %S
   
-; CHECK: @test4
+; CHECK-LABEL: @test4(
 ; CHECK: %P = phi i64
 ; CHECK-NEXT: ret i64 %P
 }
+
+; rdar://7732987
+define i32 @test5(i32 %Y) {
+  br i1 undef, label %A, label %C
+A:
+  br i1 undef, label %B, label %D
+B:
+  br label %D
+C:
+  br i1 undef, label %D, label %E
+D:
+  %P = phi i32 [0, %A], [0, %B], [%Y, %C] 
+  %S = ashr i32 %P, 16
+  ret i32 %S
+; CHECK-LABEL: @test5(
+; CHECK: %P = phi i32
+; CHECK-NEXT: ashr i32 %P, 16
+E:
+  ret i32 0
+}