PGO: preserve branch-weight metadata when merging two switches where

[oota-llvm.git] / test / Transforms / JumpThreading / basic.ll

diff --git a/test/Transforms/JumpThreading/basic.ll b/test/Transforms/JumpThreading/basic.ll
index a2a97127546822fd9248a4228df6071d775865d5..46271379bd0d4ad0de90c14b1a96dfb213d05261 100644 (file)
--- a/test/Transforms/JumpThreading/basic.ll
+++ b/test/Transforms/JumpThreading/basic.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -jump-threading -S | FileCheck %s
+; RUN: opt %s -jump-threading -S | FileCheck %s
 
 declare i32 @f1()
 declare i32 @f2()
@@ -147,11 +147,17 @@ define i32 @test6(i32 %A) {
 ; CHECK: @test6
        %tmp455 = icmp eq i32 %A, 42
        br i1 %tmp455, label %BB1, label %BB2
-        
-BB2:
+
+; CHECK: call i32 @f2()
+; CHECK-NEXT: ret i32 3
+
 ; CHECK: call i32 @f1()
-; CHECK-NEXT: call void @f3()
-; CHECK-NEXT: ret i32 4
+; CHECK-NOT: br
+; CHECK: call void @f3()
+; CHECK-NOT: br
+; CHECK: ret i32 4
+    
+BB2:
        call i32 @f1()
        br label %BB1
         
@@ -285,11 +291,109 @@ F2:
 
 
 
+; CHECK: @test10
+declare i32 @test10f1()
+declare i32 @test10f2()
+declare void @test10f3()
+
+;; Non-local condition threading.
+define i32 @test10g(i1 %cond) {
+; CHECK: @test10g
+; CHECK-NEXT:   br i1 %cond, label %T2, label %F2
+        br i1 %cond, label %T1, label %F1
+
+T1:
+        %v1 = call i32 @test10f1()
+        br label %Merge
+        
+; CHECK: %v1 = call i32 @test10f1()
+; CHECK-NEXT: call void @f3()
+; CHECK-NEXT: ret i32 %v1
+
+F1:
+        %v2 = call i32 @test10f2()
+        br label %Merge
+
+Merge:
+        %B = phi i32 [%v1, %T1], [%v2, %F1]
+        br i1 %cond, label %T2, label %F2
+
+T2:
+        call void @f3()
+        ret i32 %B
+
+F2:
+        ret i32 %B
+}
+
+
+; Impossible conditional constraints should get threaded.  BB3 is dead here.
+define i32 @test11(i32 %A) {
+; CHECK: @test11
+; CHECK-NEXT: icmp
+; CHECK-NEXT: br i1 %tmp455, label %BB4, label %BB2
+       %tmp455 = icmp eq i32 %A, 42
+       br i1 %tmp455, label %BB1, label %BB2
+        
+BB2:
+; CHECK: call i32 @f1()
+; CHECK-NEXT: ret i32 %C
+       %C = call i32 @f1()
+       ret i32 %C
+        
+
+BB1:
+       %tmp459 = icmp eq i32 %A, 43
+       br i1 %tmp459, label %BB3, label %BB4
+
+BB3:
+       call i32 @f2()
+        ret i32 3
+
+BB4:
+       call void @f3()
+       ret i32 4
+}
 
-;;; Duplicate condition to avoid xor of cond.
-define i32 @test10(i1 %cond, i1 %cond2) {
+;; Correlated value through boolean expression.  GCC PR18046.
+define void @test12(i32 %A) {
+; CHECK: @test12
+entry:
+  %cond = icmp eq i32 %A, 0
+  br i1 %cond, label %bb, label %bb1
+; Should branch to the return block instead of through BB1.
+; CHECK: entry:
+; CHECK-NEXT: %cond = icmp eq i32 %A, 0
+; CHECK-NEXT: br i1 %cond, label %bb1, label %return
+
+bb:                   
+  %B = call i32 @test10f2()
+  br label %bb1
+
+bb1:
+  %C = phi i32 [ %A, %entry ], [ %B, %bb ]
+  %cond4 = icmp eq i32 %C, 0
+  br i1 %cond4, label %bb2, label %return
+
+; CHECK: bb1:
+; CHECK-NEXT: %B = call i32 @test10f2()
+; CHECK-NEXT: %cond4 = icmp eq i32 %B, 0
+; CHECK-NEXT: br i1 %cond4, label %bb2, label %return
+
+bb2:
+  %D = call i32 @test10f2()
+  ret void
+
+return:
+  ret void
+}
+
+
+;; Duplicate condition to avoid xor of cond.
+;; rdar://7391699
+define i32 @test13(i1 %cond, i1 %cond2) {
 Entry:
-; CHECK: @test10
+; CHECK: @test13
        %v1 = call i32 @f1()
        br i1 %cond, label %Merge, label %F1
 
@@ -298,7 +402,8 @@ F1:
 
 Merge:
        %B = phi i1 [true, %Entry], [%cond2, %F1]
-        %M = icmp eq i32 %v1, 192
+        %C = phi i32 [192, %Entry], [%v1, %F1]
+        %M = icmp eq i32 %C, 192
         %N = xor i1 %B, %M
        br i1 %N, label %T2, label %F2
 
@@ -307,6 +412,67 @@ T2:
 
 F2:
        ret i32 %v1
+        
+; CHECK:   br i1 %cond, label %F2, label %Merge
+
+; CHECK:      Merge:
+; CHECK-NEXT:   %M = icmp eq i32 %v1, 192
+; CHECK-NEXT:   %N = xor i1 %cond2, %M
+; CHECK-NEXT:   br i1 %N, label %T2, label %F2
 }
 
+; CHECK: @test14
+define i32 @test14(i32 %in) {
+entry:
+       %A = icmp eq i32 %in, 0
+; CHECK: br i1 %A, label %right_ret, label %merge
+  br i1 %A, label %left, label %right
+
+; CHECK-NOT: left:
+left:
+       br label %merge
+
+; CHECK-NOT: right:
+right:
+  %B = call i32 @f1()
+       br label %merge
+
+merge:
+; CHECK-NOT: %C = phi i32 [%in, %left], [%B, %right]
+       %C = phi i32 [%in, %left], [%B, %right]
+       %D = add i32 %C, 1
+       %E = icmp eq i32 %D, 2
+       br i1 %E, label %left_ret, label %right_ret
+
+; CHECK: left_ret:
+left_ret:
+       ret i32 0
+
+right_ret:
+       ret i32 1
+}
+
+; PR5652
+; CHECK: @test15
+define i32 @test15(i32 %len) {
+entry:
+; CHECK: icmp ult i32 %len, 13
+  %tmp = icmp ult i32 %len, 13
+  br i1 %tmp, label %check, label %exit0
+
+exit0:
+  ret i32 0
+
+check:
+  %tmp9 = icmp ult i32 %len, 21
+  br i1 %tmp9, label %exit1, label %exit2
+
+exit2:
+; CHECK-NOT: ret i32 2
+  ret i32 2
+
+exit1:
+  ret i32 1
+; CHECK: }
+}