PR9055: extend the fix to PR4050 (r70179) to apply to zext and anyext.

[oota-llvm.git] / test / Transforms / LICM / scalar_promote.ll

diff --git a/test/Transforms/LICM/scalar_promote.ll b/test/Transforms/LICM/scalar_promote.ll
index 6b103f3a1f86efb057d3e756258dac05cfa08fc5..d8acdc1a3ad7594c84b73308a2581765aacf33ef 100644 (file)
--- a/test/Transforms/LICM/scalar_promote.ll
+++ b/test/Transforms/LICM/scalar_promote.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s  -licm -S | FileCheck %s
+; RUN: opt < %s -basicaa -licm -S | FileCheck %s
 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
 
 @X = global i32 7              ; <i32*> [#uses=4]
@@ -71,3 +71,80 @@ Out:         ; preds = %Loop
        ret void
 }
 
+; PR8041
+define void @test4(i8* %x, i8 %n) {
+; CHECK: @test4
+  %handle1 = alloca i8*
+  %handle2 = alloca i8*
+  store i8* %x, i8** %handle1
+  br label %loop
+
+loop:
+  %tmp = getelementptr i8* %x, i64 8
+  store i8* %tmp, i8** %handle2
+  br label %subloop
+
+subloop:
+  %count = phi i8 [ 0, %loop ], [ %nextcount, %subloop ]
+  %offsetx2 = load i8** %handle2
+  store i8 %n, i8* %offsetx2
+  %newoffsetx2 = getelementptr i8* %offsetx2, i64 -1
+  store i8* %newoffsetx2, i8** %handle2
+  %nextcount = add i8 %count, 1
+  %innerexitcond = icmp sge i8 %nextcount, 8
+  br i1 %innerexitcond, label %innerexit, label %subloop
+
+; Should have promoted 'handle2' accesses.
+; CHECK: subloop:
+; CHECK-NEXT: phi i8* [
+; CHECK-NEXT: %count = phi i8 [
+; CHECK-NEXT: store i8 %n
+; CHECK-NOT: store
+; CHECK: br i1
+
+innerexit:
+  %offsetx1 = load i8** %handle1
+  %val = load i8* %offsetx1
+  %cond = icmp eq i8 %val, %n
+  br i1 %cond, label %exit, label %loop
+
+; Should not have promoted offsetx1 loads.
+; CHECK: innerexit:
+; CHECK: %val = load i8* %offsetx1
+; CHECK: %cond = icmp eq i8 %val, %n
+; CHECK: br i1 %cond, label %exit, label %loop
+
+exit:
+  ret void
+}
+
+define void @test5(i32 %i, i32** noalias %P2) {
+Entry:
+       br label %Loop
+; CHECK: @test5
+; CHECK: Entry:
+; CHECK-NEXT:   load i32* @X
+; CHECK-NEXT:   br label %Loop
+
+
+Loop:          ; preds = %Loop, %0
+       %j = phi i32 [ 0, %Entry ], [ %Next, %Loop ]            ; <i32> [#uses=1]
+       %x = load i32* @X               ; <i32> [#uses=1]
+       %x2 = add i32 %x, 1             ; <i32> [#uses=1]
+       store i32 %x2, i32* @X
+        
+        volatile store i32* @X, i32** %P2
+        
+       %Next = add i32 %j, 1           ; <i32> [#uses=2]
+       %cond = icmp eq i32 %Next, 0            ; <i1> [#uses=1]
+       br i1 %cond, label %Out, label %Loop
+
+Out:   
+       ret void
+; CHECK: Out:
+; CHECK-NEXT:   store i32 %x2, i32* @X
+; CHECK-NEXT:   ret void
+
+}
+
+