remove dead .erase.

[oota-llvm.git] / utils / TableGen / CodeEmitterGen.cpp

diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp
index bebf1fd56b81a230e8e9d17189ef9d41dc9b3870..714a39c7f4f30d4d6297c6018441c37128d5bf83 100644 (file)
--- a/utils/TableGen/CodeEmitterGen.cpp
+++ b/utils/TableGen/CodeEmitterGen.cpp
@@ -26,12 +26,17 @@ void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
     Record *R = *I;
     if (R->getName() == "PHI" ||
         R->getName() == "INLINEASM" ||
-        R->getName() == "LABEL" ||
-        R->getName() == "DECLARE" ||
+        R->getName() == "DBG_LABEL" ||
+        R->getName() == "EH_LABEL" ||
+        R->getName() == "GC_LABEL" ||
+        R->getName() == "KILL" ||
         R->getName() == "EXTRACT_SUBREG" ||
         R->getName() == "INSERT_SUBREG" ||
-        R->getName() == "IMPLICIT_DEF") continue;
-    
+        R->getName() == "IMPLICIT_DEF" ||
+        R->getName() == "SUBREG_TO_REG" ||
+        R->getName() == "COPY_TO_REGCLASS" ||
+        R->getName() == "DEBUG_VALUE") continue;
+
     BitsInit *BI = R->getValueAsBitsInit("Inst");
 
     unsigned numBits = BI->getNumBits();
@@ -71,7 +76,7 @@ int CodeEmitterGen::getVariableBit(const std::string &VarName,
 } 
 
 
-void CodeEmitterGen::run(std::ostream &o) {
+void CodeEmitterGen::run(raw_ostream &o) {
   CodeGenTarget Target;
   std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
   
@@ -86,7 +91,7 @@ void CodeEmitterGen::run(std::ostream &o) {
 
   // Emit function declaration
   o << "unsigned " << Target.getName() << "CodeEmitter::"
-    << "getBinaryCodeForInstr(MachineInstr &MI) {\n";
+    << "getBinaryCodeForInstr(const MachineInstr &MI) {\n";
 
   // Emit instruction base values
   o << "  static const unsigned InstBits[] = {\n";
@@ -97,16 +102,19 @@ void CodeEmitterGen::run(std::ostream &o) {
     const CodeGenInstruction *CGI = *IN;
     Record *R = CGI->TheDef;
     
-    if (IN != NumberedInstructions.begin()) o << ",\n";
-    
     if (R->getName() == "PHI" ||
         R->getName() == "INLINEASM" ||
-        R->getName() == "LABEL" ||
-        R->getName() == "DECLARE" ||
+        R->getName() == "DBG_LABEL" ||
+        R->getName() == "EH_LABEL" ||
+        R->getName() == "GC_LABEL" ||
+        R->getName() == "KILL" ||
         R->getName() == "EXTRACT_SUBREG" ||
         R->getName() == "INSERT_SUBREG" ||
-        R->getName() == "IMPLICIT_DEF") {
-      o << "    0U";
+        R->getName() == "IMPLICIT_DEF" ||
+        R->getName() == "SUBREG_TO_REG" ||
+        R->getName() == "COPY_TO_REGCLASS" ||
+        R->getName() == "DEBUG_VALUE") {
+      o << "    0U,\n";
       continue;
     }
     
@@ -119,9 +127,9 @@ void CodeEmitterGen::run(std::ostream &o) {
         Value |= B->getValue() << (e-i-1);
       }
     }
-    o << "    " << Value << "U";
+    o << "    " << Value << "U," << '\t' << "// " << R->getName() << "\n";
   }
-  o << "\n  };\n";
+  o << "    0U\n  };\n";
   
   // Map to accumulate all the cases.
   std::map<std::string, std::vector<std::string> > CaseMap;
@@ -135,12 +143,17 @@ void CodeEmitterGen::run(std::ostream &o) {
     
     if (InstName == "PHI" ||
         InstName == "INLINEASM" ||
-        InstName == "LABEL"||
-        InstName == "DECLARE"||
+        InstName == "DBG_LABEL"||
+        InstName == "EH_LABEL"||
+        InstName == "GC_LABEL"||
+        InstName == "KILL"||
         InstName == "EXTRACT_SUBREG" ||
         InstName == "INSERT_SUBREG" ||
-        InstName == "IMPLICIT_DEF") continue;
-    
+        InstName == "IMPLICIT_DEF" ||
+        InstName == "SUBREG_TO_REG" ||
+        InstName == "COPY_TO_REGCLASS" ||
+        InstName == "DEBUG_VALUE") continue;
+
     BitsInit *BI = R->getValueAsBitsInit("Inst");
     const std::vector<RecordVal> &Vals = R->getValues();
     CodeGenInstruction &CGI = Target.getInstruction(InstName);
@@ -184,7 +197,7 @@ void CodeEmitterGen::run(std::ostream &o) {
               gotOp = true;
             }
             
-            unsigned opMask = (1 << N) - 1;
+            unsigned opMask = ~0U >> (32-N);
             int opShift = beginVarBit - N + 1;
             opMask <<= opShift;
             opShift = beginInstBit - beginVarBit;
@@ -211,7 +224,8 @@ void CodeEmitterGen::run(std::ostream &o) {
   // Emit initial function code
   o << "  const unsigned opcode = MI.getOpcode();\n"
     << "  unsigned Value = InstBits[opcode];\n"
-    << "  unsigned op;\n"
+    << "  unsigned op = 0;\n"
+    << "  op = op;  // suppress warning\n"
     << "  switch (opcode) {\n";
 
   // Emit each case statement
@@ -232,8 +246,10 @@ void CodeEmitterGen::run(std::ostream &o) {
 
   // Default case: unhandled opcode
   o << "  default:\n"
-    << "    cerr << \"Not supported instr: \" << MI << \"\\n\";\n"
-    << "    abort();\n"
+    << "    std::string msg;\n"
+    << "    raw_string_ostream Msg(msg);\n"
+    << "    Msg << \"Not supported instr: \" << MI;\n"
+    << "    llvm_report_error(Msg.str());\n"
     << "  }\n"
     << "  return Value;\n"
     << "}\n\n";