Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass...

[oota-llvm.git] / utils / TableGen / CodeEmitterGen.cpp

diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp
index ddf8eeb84aaf6a4d486240b00273b8bac5c6ac52..a21a31c2bfc123f8d2b1a2d7f96972c4eac3de36 100644 (file)
--- a/utils/TableGen/CodeEmitterGen.cpp
+++ b/utils/TableGen/CodeEmitterGen.cpp
@@ -27,8 +27,11 @@ void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
     if (R->getName() == "PHI" ||
         R->getName() == "INLINEASM" ||
         R->getName() == "LABEL" ||
+        R->getName() == "DECLARE" ||
         R->getName() == "EXTRACT_SUBREG" ||
-        R->getName() == "INSERT_SUBREG") continue;
+        R->getName() == "INSERT_SUBREG" ||
+        R->getName() == "IMPLICIT_DEF" ||
+        R->getName() == "SUBREG_TO_REG") continue;
     
     BitsInit *BI = R->getValueAsBitsInit("Inst");
 
@@ -100,8 +103,11 @@ void CodeEmitterGen::run(std::ostream &o) {
     if (R->getName() == "PHI" ||
         R->getName() == "INLINEASM" ||
         R->getName() == "LABEL" ||
+        R->getName() == "DECLARE" ||
         R->getName() == "EXTRACT_SUBREG" ||
-        R->getName() == "INSERT_SUBREG") {
+        R->getName() == "INSERT_SUBREG" ||
+        R->getName() == "IMPLICIT_DEF" ||
+        R->getName() == "SUBREG_TO_REG") {
       o << "    0U";
       continue;
     }
@@ -132,8 +138,11 @@ void CodeEmitterGen::run(std::ostream &o) {
     if (InstName == "PHI" ||
         InstName == "INLINEASM" ||
         InstName == "LABEL"||
+        InstName == "DECLARE"||
         InstName == "EXTRACT_SUBREG" ||
-        InstName == "INSERT_SUBREG") continue;
+        InstName == "INSERT_SUBREG" ||
+        InstName == "IMPLICIT_DEF" ||
+        InstName == "SUBREG_TO_REG") continue;
     
     BitsInit *BI = R->getValueAsBitsInit("Inst");
     const std::vector<RecordVal> &Vals = R->getValues();