Add annotations to tablegen-generated processor itineraries, or replace them with...
[oota-llvm.git] / utils / TableGen / CodeEmitterGen.h
index 7ae3ef8d92c12b579488ba26167310082b0f0b29..a874d970feac6c4116a31bb1ddc1bf365196b18d 100644 (file)
@@ -1,5 +1,12 @@
 //===- CodeEmitterGen.h - Code Emitter Generator ----------------*- C++ -*-===//
 //
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
 // FIXME: document
 //
 //===----------------------------------------------------------------------===//
 #ifndef CODEMITTERGEN_H
 #define CODEMITTERGEN_H
 
+#include "TableGenBackend.h"
+#include <vector>
 #include <string>
-#include <iosfwd>
-class RecordKeeper;
 
-class CodeEmitterGen {
+namespace llvm {
+
+class RecordVal;
+class BitsInit;
+class CodeGenTarget;
+
+class CodeEmitterGen : public TableGenBackend {
   RecordKeeper &Records;
 public:
   CodeEmitterGen(RecordKeeper &R) : Records(R) {}
-  
+
   // run - Output the code emitter
-  void run(std::ostream &o);
+  void run(raw_ostream &o);
 private:
-  void emitMachineOpEmitter(std::ostream &o, const std::string &Namespace);
-  void emitGetValueBit(std::ostream &o, const std::string &Namespace);
+  void emitMachineOpEmitter(raw_ostream &o, const std::string &Namespace);
+  void emitGetValueBit(raw_ostream &o, const std::string &Namespace);
+  void reverseBits(std::vector<Record*> &Insts);
+  int getVariableBit(const std::string &VarName, BitsInit *BI, int bit);
+  std::string getInstructionCase(Record *R, CodeGenTarget &Target);
+  void
+  AddCodeToMergeInOperand(Record *R, BitsInit *BI, const std::string &VarName,
+                          unsigned &NumberedOp,
+                          std::string &Case, CodeGenTarget &Target);
+    
 };
 
+} // End llvm namespace
+
 #endif