Remove some instructions that seem to only exist to trick the filtering checks in...

[oota-llvm.git] / utils / TableGen / CodeGenRegisters.cpp

diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp
index 9f1c9dd35f5a70ac27cd79739950fe1a17e6c7dc..f2eef4f68f5a7a18119e00329a0b32f64d04d1a0 100644 (file)
--- a/utils/TableGen/CodeGenRegisters.cpp
+++ b/utils/TableGen/CodeGenRegisters.cpp
@@ -813,9 +813,10 @@ static bool testSubClass(const CodeGenRegisterClass *A,
 /// Register classes with the same registers, spill size, and alignment form a
 /// clique.  They will be ordered alphabetically.
 ///
-static int TopoOrderRC(const void *PA, const void *PB) {
-  const CodeGenRegisterClass *A = *(const CodeGenRegisterClass* const*)PA;
-  const CodeGenRegisterClass *B = *(const CodeGenRegisterClass* const*)PB;
+static int TopoOrderRC(CodeGenRegisterClass *const *PA,
+                       CodeGenRegisterClass *const *PB) {
+  const CodeGenRegisterClass *A = *PA;
+  const CodeGenRegisterClass *B = *PB;
   if (A == B)
     return 0;
 
@@ -1470,7 +1471,7 @@ static bool isRegUnitSubSet(const std::vector<unsigned> &RUSubSet,
                        RUSubSet.begin(), RUSubSet.end());
 }
 
-/// Iteratively prune unit sets. Prune subsets that are close the the superset,
+/// Iteratively prune unit sets. Prune subsets that are close to the superset,
 /// but with one or two registers removed. We occasionally have registers like
 /// APSR and PC thrown in with the general registers. We also see many
 /// special-purpose register subsets, such as tail-call and Thumb