Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without...

[oota-llvm.git] / utils / TableGen / CodeGenTarget.cpp

diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index 4613c1ba248ba2f1dedc1c9095121e9c87930f9d..7d2e7b3d13472ba58fcf61a8a501fa8c3f6b5623 100644 (file)
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -19,6 +19,7 @@
 #include "Record.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Streams.h"
 #include <set>
 #include <algorithm>
 using namespace llvm;
@@ -42,6 +43,7 @@ std::string llvm::getName(MVT::ValueType T) {
   case MVT::i32:   return "MVT::i32";
   case MVT::i64:   return "MVT::i64";
   case MVT::i128:  return "MVT::i128";
+  case MVT::iAny:  return "MVT::iAny";
   case MVT::f32:   return "MVT::f32";
   case MVT::f64:   return "MVT::f64";
   case MVT::f80:   return "MVT::f80";
@@ -51,6 +53,7 @@ std::string llvm::getName(MVT::ValueType T) {
   case MVT::v8i8:  return "MVT::v8i8";
   case MVT::v4i16: return "MVT::v4i16";
   case MVT::v2i32: return "MVT::v2i32";
+  case MVT::v1i64: return "MVT::v1i64";
   case MVT::v16i8: return "MVT::v16i8";
   case MVT::v8i16: return "MVT::v8i16";
   case MVT::v4i32: return "MVT::v4i32";
@@ -72,6 +75,7 @@ std::string llvm::getEnumName(MVT::ValueType T) {
   case MVT::i32:   return "MVT::i32";
   case MVT::i64:   return "MVT::i64";
   case MVT::i128:  return "MVT::i128";
+  case MVT::iAny:  return "MVT::iAny";
   case MVT::f32:   return "MVT::f32";
   case MVT::f64:   return "MVT::f64";
   case MVT::f80:   return "MVT::f80";
@@ -81,6 +85,7 @@ std::string llvm::getEnumName(MVT::ValueType T) {
   case MVT::v8i8:  return "MVT::v8i8";
   case MVT::v4i16: return "MVT::v4i16";
   case MVT::v2i32: return "MVT::v2i32";
+  case MVT::v1i64: return "MVT::v1i64";
   case MVT::v16i8: return "MVT::v16i8";
   case MVT::v8i16: return "MVT::v8i16";
   case MVT::v4i32: return "MVT::v4i32";
@@ -257,11 +262,18 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
   if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!";
   const CodeGenInstruction *INLINEASM = &I->second;
   
+  I = getInstructions().find("LABEL");
+  if (I == Instructions.end()) throw "Could not find 'LABEL' instruction!";
+  const CodeGenInstruction *LABEL = &I->second;
+  
   // Print out the rest of the instructions now.
   NumberedInstructions.push_back(PHI);
   NumberedInstructions.push_back(INLINEASM);
+  NumberedInstructions.push_back(LABEL);
   for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
-    if (&II->second != PHI &&&II->second != INLINEASM)
+    if (&II->second != PHI &&
+        &II->second != INLINEASM &&
+        &II->second != LABEL)
       NumberedInstructions.push_back(&II->second);
 }
 
@@ -302,7 +314,7 @@ static void ParseConstraint(const std::string &CStr, CodeGenInstruction *I) {
   unsigned FlatOpNo = I->getFlattenedOperandNumber(SrcOp);
   // Build the string for the operand.
   std::string OpConstraint =
-    "((" + utostr(FlatOpNo) + " << 16) | (1 << TargetInstrInfo::TIED_TO))";
+    "((" + utostr(FlatOpNo) + " << 16) | (1 << TOI::TIED_TO))";
 
   
   if (!I->OperandList[DestOp.first].Constraints[DestOp.second].empty())
@@ -344,10 +356,11 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
   isLoad       = R->getValueAsBit("isLoad");
   isStore      = R->getValueAsBit("isStore");
   bool isTwoAddress = R->getValueAsBit("isTwoAddress");
-  isPredicated = false;   // set below.
+  isPredicable = R->getValueAsBit("isPredicable");
   isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress");
   isCommutable = R->getValueAsBit("isCommutable");
   isTerminator = R->getValueAsBit("isTerminator");
+  isReMaterializable = R->getValueAsBit("isReMaterializable");
   hasDelaySlot = R->getValueAsBit("hasDelaySlot");
   usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter");
   hasCtrlDep   = R->getValueAsBit("hasCtrlDep");
@@ -391,7 +404,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
       if (unsigned NumArgs = MIOpInfo->getNumArgs())
         NumOps = NumArgs;
 
-      isPredicated |= Rec->isSubClassOf("PredicateOperand");
+      isPredicable |= Rec->isSubClassOf("PredicateOperand");
     } else if (Rec->getName() == "variable_ops") {
       hasVariableNumberOfOperands = true;
       continue;
@@ -422,8 +435,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
     if (!OperandList[1].Constraints[0].empty())
       throw R->getName() + ": cannot use isTwoAddress property: instruction "
             "already has constraint set!";
-    OperandList[1].Constraints[0] =
-      "((0 << 16) | (1 << TargetInstrInfo::TIED_TO))";
+    OperandList[1].Constraints[0] = "((0 << 16) | (1 << TOI::TIED_TO))";
   }
   
   // Any operands with unset constraints get 0 as their constraint.
@@ -528,8 +540,8 @@ ComplexPattern::ComplexPattern(Record *R) {
     } else if (PropList[i]->getName() == "SDNPOptInFlag") {
       Properties |= 1 << SDNPOptInFlag;
     } else {
-      std::cerr << "Unsupported SD Node property '" << PropList[i]->getName()
-                << "' on ComplexPattern '" << R->getName() << "'!\n";
+      cerr << "Unsupported SD Node property '" << PropList[i]->getName()
+           << "' on ComplexPattern '" << R->getName() << "'!\n";
       exit(1);
     }
 }
@@ -560,6 +572,7 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R, CodeGenTarget *CGT) {
   TheDef = R;
   std::string DefName = R->getName();
   ModRef = WriteMem;
+  isOverloaded = false;
   
   if (DefName.size() <= 4 || 
       std::string(DefName.begin(), DefName.begin()+4) != "int_")
@@ -597,25 +610,22 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R, CodeGenTarget *CGT) {
   // Parse the list of argument types.
   ListInit *TypeList = R->getValueAsListInit("Types");
   for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
-    DefInit *DI = dynamic_cast<DefInit*>(TypeList->getElement(i));
-    assert(DI && "Invalid list type!");
-    Record *TyEl = DI->getDef();
+    Record *TyEl = TypeList->getElementAsRecord(i);
     assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
     ArgTypes.push_back(TyEl->getValueAsString("TypeVal"));
-    
-    if (CGT)
-      ArgVTs.push_back(getValueType(TyEl->getValueAsDef("VT"), CGT));
+    MVT::ValueType VT = getValueType(TyEl->getValueAsDef("VT"), CGT);
+    isOverloaded |= VT == MVT::iAny;
+    ArgVTs.push_back(VT);
     ArgTypeDefs.push_back(TyEl);
   }
   if (ArgTypes.size() == 0)
     throw "Intrinsic '"+DefName+"' needs at least a type for the ret value!";
+
   
   // Parse the intrinsic properties.
   ListInit *PropList = R->getValueAsListInit("Properties");
   for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
-    DefInit *DI = dynamic_cast<DefInit*>(PropList->getElement(i));
-    assert(DI && "Invalid list type!");
-    Record *Property = DI->getDef();
+    Record *Property = PropList->getElementAsRecord(i);
     assert(Property->isSubClassOf("IntrinsicProperty") &&
            "Expected a property!");