case MVT::i32: return "MVT::i32";
case MVT::i64: return "MVT::i64";
case MVT::i128: return "MVT::i128";
+ case MVT::iAny: return "MVT::iAny";
case MVT::f32: return "MVT::f32";
case MVT::f64: return "MVT::f64";
case MVT::f80: return "MVT::f80";
case MVT::i32: return "MVT::i32";
case MVT::i64: return "MVT::i64";
case MVT::i128: return "MVT::i128";
+ case MVT::iAny: return "MVT::iAny";
case MVT::f32: return "MVT::f32";
case MVT::f64: return "MVT::f64";
case MVT::f80: return "MVT::f80";
isLoad = R->getValueAsBit("isLoad");
isStore = R->getValueAsBit("isStore");
bool isTwoAddress = R->getValueAsBit("isTwoAddress");
- isPredicated = false; // set below.
+ isPredicable = R->getValueAsBit("isPredicable");
isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress");
isCommutable = R->getValueAsBit("isCommutable");
isTerminator = R->getValueAsBit("isTerminator");
if (unsigned NumArgs = MIOpInfo->getNumArgs())
NumOps = NumArgs;
- isPredicated |= Rec->isSubClassOf("PredicateOperand");
+ isPredicable |= Rec->isSubClassOf("PredicateOperand");
} else if (Rec->getName() == "variable_ops") {
hasVariableNumberOfOperands = true;
continue;
TheDef = R;
std::string DefName = R->getName();
ModRef = WriteMem;
+ isOverloaded = false;
if (DefName.size() <= 4 ||
std::string(DefName.begin(), DefName.begin()+4) != "int_")
Record *TyEl = TypeList->getElementAsRecord(i);
assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
ArgTypes.push_back(TyEl->getValueAsString("TypeVal"));
-
- if (CGT)
- ArgVTs.push_back(getValueType(TyEl->getValueAsDef("VT"), CGT));
+ MVT::ValueType VT = getValueType(TyEl->getValueAsDef("VT"), CGT);
+ isOverloaded |= VT == MVT::iAny;
+ ArgVTs.push_back(VT);
ArgTypeDefs.push_back(TyEl);
}
if (ArgTypes.size() == 0)
throw "Intrinsic '"+DefName+"' needs at least a type for the ret value!";
+
// Parse the intrinsic properties.
ListInit *PropList = R->getValueAsListInit("Properties");