Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a step

[oota-llvm.git] / utils / TableGen / DisassemblerEmitter.cpp

diff --git a/utils/TableGen/DisassemblerEmitter.cpp b/utils/TableGen/DisassemblerEmitter.cpp
index 3284366c6dd8e2da3583f32971ea4efe48a99a5e..2d8bf6634aa8fb345dc30f562f70ab08504a4c20 100644 (file)
--- a/utils/TableGen/DisassemblerEmitter.cpp
+++ b/utils/TableGen/DisassemblerEmitter.cpp
@@ -94,7 +94,7 @@ using namespace llvm::X86Disassembler;
 ///   instruction.
 
 void DisassemblerEmitter::run(raw_ostream &OS) {
-  CodeGenTarget Target;
+  CodeGenTarget Target(Records);
 
   OS << "/*===- TableGen'erated file "
      << "---------------------------------------*- C -*-===*\n"