///////////////////////////////////////////////////////////
namespace {
-
+
class EnumEmitter {
private:
std::string Name;
std::vector<std::string> Entries;
public:
- EnumEmitter(const char *N) : Name(N) {
+ EnumEmitter(const char *N) : Name(N) {
}
- int addEntry(const char *e) {
+ int addEntry(const char *e) {
Entries.push_back(std::string(e));
- return Entries.size() - 1;
+ return Entries.size() - 1;
}
void emit(raw_ostream &o, unsigned int &i) {
o.indent(i) << "enum " << Name.c_str() << " {" << "\n";
i += 2;
-
+
unsigned int index = 0;
unsigned int numEntries = Entries.size();
for (index = 0; index < numEntries; ++index) {
o << ",";
o << "\n";
}
-
+
i -= 2;
o.indent(i) << "};" << "\n";
}
-
+
void emitAsFlags(raw_ostream &o, unsigned int &i) {
o.indent(i) << "enum " << Name.c_str() << " {" << "\n";
i += 2;
-
+
unsigned int index = 0;
unsigned int numEntries = Entries.size();
unsigned int flag = 1;
o << "\n";
flag <<= 1;
}
-
- i -= 2;
- o.indent(i) << "};" << "\n";
- }
- };
- class StructEmitter {
- private:
- std::string Name;
- typedef std::pair<const char*, const char*> member;
- std::vector< member > Members;
- public:
- StructEmitter(const char *N) : Name(N) {
- }
- void addMember(const char *t, const char *n) {
- member m(t, n);
- Members.push_back(m);
- }
- void emit(raw_ostream &o, unsigned int &i) {
- o.indent(i) << "struct " << Name.c_str() << " {" << "\n";
- i += 2;
-
- unsigned int index = 0;
- unsigned int numMembers = Members.size();
- for (index = 0; index < numMembers; ++index) {
- o.indent(i) << Members[index].first << " ";
- o.indent(i) << Members[index].second << ";" << "\n";
- }
-
i -= 2;
o.indent(i) << "};" << "\n";
}
};
-
+
class ConstantEmitter {
public:
virtual ~ConstantEmitter() { }
virtual void emit(raw_ostream &o, unsigned int &i) = 0;
};
-
+
class LiteralConstantEmitter : public ConstantEmitter {
private:
bool IsNumber;
const char* String;
};
public:
- LiteralConstantEmitter(const char *string) :
- IsNumber(false),
- String(string) {
- }
- LiteralConstantEmitter(int number = 0) :
+ LiteralConstantEmitter(int number = 0) :
IsNumber(true),
Number(number) {
}
Number = 0;
String = string;
}
- void set(int number) {
- IsNumber = true;
- String = NULL;
- Number = number;
- }
bool is(const char *string) {
return !strcmp(String, string);
}
o << String;
}
};
-
+
class CompoundConstantEmitter : public ConstantEmitter {
private:
unsigned int Padding;
}
CompoundConstantEmitter &addEntry(ConstantEmitter *e) {
Entries.push_back(e);
-
+
return *this;
}
~CompoundConstantEmitter() {
void emit(raw_ostream &o, unsigned int &i) {
o << "{" << "\n";
i += 2;
-
+
unsigned int index;
unsigned int numEntries = Entries.size();
-
+
unsigned int numToPrint;
-
+
if (Padding) {
if (numEntries > Padding) {
fprintf(stderr, "%u entries but %u padding\n", numEntries, Padding);
} else {
numToPrint = numEntries;
}
-
+
for (index = 0; index < numToPrint; ++index) {
o.indent(i);
if (index < numEntries)
Entries[index]->emit(o, i);
else
o << "-1";
-
+
if (index < (numToPrint - 1))
o << ",";
o << "\n";
}
-
+
i -= 2;
o.indent(i) << "}";
}
};
-
+
class FlagsConstantEmitter : public ConstantEmitter {
private:
std::vector<std::string> Flags;
unsigned int numFlags = Flags.size();
if (numFlags == 0)
o << "0";
-
+
for (index = 0; index < numFlags; ++index) {
o << Flags[index].c_str();
if (index < (numFlags - 1))
const CodeGenInstruction &inst,
unsigned syntax) {
unsigned int numArgs = 0;
-
+
AsmWriterInst awInst(inst, syntax, -1, -1);
-
+
std::vector<AsmWriterOperand>::iterator operandIterator;
-
+
for (operandIterator = awInst.Operands.begin();
operandIterator != awInst.Operands.end();
++operandIterator) {
- if (operandIterator->OperandType ==
+ if (operandIterator->OperandType ==
AsmWriterOperand::isMachineInstrOperand) {
operandOrder->addEntry(
new LiteralConstantEmitter(operandIterator->CGIOpNo));
REG("RFP64");
REG("RFP80");
REG("VR128");
+ REG("VR256");
REG("RST");
REG("SEGMENT_REG");
REG("DEBUG_REG");
REG("CONTROL_REG");
-
+
IMM("i8imm");
IMM("i16imm");
IMM("i16i8imm");
IMM("i64i8imm");
IMM("i64i32imm");
IMM("SSECC");
-
+
// all R, I, R, I, R
MEM("i8mem");
MEM("i8mem_NOREX");
MEM("f80mem");
MEM("opaque80mem");
MEM("i128mem");
+ MEM("i256mem");
MEM("f128mem");
+ MEM("f256mem");
MEM("opaque512mem");
-
+
// all R, I, R, I
LEA("lea32mem");
LEA("lea64_32mem");
LEA("lea64mem");
-
+
// all I
+ PCR("i16imm_pcrel");
PCR("i32imm_pcrel");
PCR("i64i32imm_pcrel");
PCR("brtarget8");
PCR("offset32");
PCR("offset64");
PCR("brtarget");
-
+ PCR("uncondbrtarget");
+ PCR("bltarget");
+
return 1;
}
const CodeGenInstruction &inst) {
if (!inst.TheDef->isSubClassOf("X86Inst"))
return;
-
+
unsigned int index;
- unsigned int numOperands = inst.OperandList.size();
-
+ unsigned int numOperands = inst.Operands.size();
+
for (index = 0; index < numOperands; ++index) {
- const CodeGenInstruction::OperandInfo &operandInfo =
- inst.OperandList[index];
+ const CGIOperandList::OperandInfo &operandInfo = inst.Operands[index];
Record &rec = *operandInfo.Rec;
-
+
if (X86TypeFromOpName(operandTypes[index], rec.getName())) {
errs() << "Operand type: " << rec.getName().c_str() << "\n";
errs() << "Operand name: " << operandInfo.Name.c_str() << "\n";
- errs() << "Instruction mame: " << inst.TheDef->getName().c_str() << "\n";
+ errs() << "Instruction name: " << inst.TheDef->getName().c_str() << "\n";
llvm_unreachable("Unhandled type");
}
}
const char *opName,
const char *opFlag) {
unsigned opIndex;
-
- opIndex = inst.getOperandNamed(std::string(opName));
-
+
+ opIndex = inst.Operands.getOperandNamed(std::string(opName));
+
operandFlags[opIndex]->addEntry(opFlag);
}
}
/// X86ExtractSemantics - Performs various checks on the name of an X86
-/// instruction to determine what sort of an instruction it is and then adds
+/// instruction to determine what sort of an instruction it is and then adds
/// the appropriate flags to the instruction and its operands
///
/// @arg instType - A reference to the type for the instruction as a whole
FlagsConstantEmitter *(&operandFlags)[EDIS_MAX_OPERANDS],
const CodeGenInstruction &inst) {
const std::string &name = inst.TheDef->getName();
-
+
if (name.find("MOV") != name.npos) {
if (name.find("MOV_V") != name.npos) {
// ignore (this is a pseudoinstruction)
MOV("src", "dst");
}
}
-
+
if (name.find("JMP") != name.npos ||
name.find("J") == 0) {
if (name.find("FAR") != name.npos && name.find("i") != name.npos) {
BRANCH("dst");
}
}
-
+
if (name.find("PUSH") != name.npos) {
- if (name.find("FS") != name.npos ||
- name.find("GS") != name.npos) {
+ if (name.find("CS") != name.npos ||
+ name.find("DS") != name.npos ||
+ name.find("ES") != name.npos ||
+ name.find("FS") != name.npos ||
+ name.find("GS") != name.npos ||
+ name.find("SS") != name.npos) {
instType.set("kInstructionTypePush");
// TODO add support for fixed operands
} else if (name.find("F") != name.npos) {
// ignore (this pushes onto the FP stack)
+ } else if (name.find("A") != name.npos) {
+ // ignore (pushes all GP registoers onto the stack)
} else if (name[name.length() - 1] == 'm') {
PUSH("src");
} else if (name.find("i") != name.npos) {
PUSH("reg");
}
}
-
+
if (name.find("POP") != name.npos) {
if (name.find("POPCNT") != name.npos) {
// ignore (not a real pop)
- } else if (name.find("FS") != name.npos ||
- name.find("GS") != name.npos) {
+ } else if (name.find("CS") != name.npos ||
+ name.find("DS") != name.npos ||
+ name.find("ES") != name.npos ||
+ name.find("FS") != name.npos ||
+ name.find("GS") != name.npos ||
+ name.find("SS") != name.npos) {
instType.set("kInstructionTypePop");
// TODO add support for fixed operands
} else if (name.find("F") != name.npos) {
// ignore (this pops from the FP stack)
+ } else if (name.find("A") != name.npos) {
+ // ignore (pushes all GP registoers onto the stack)
} else if (name[name.length() - 1] == 'm') {
POP("dst");
} else {
POP("reg");
}
}
-
+
if (name.find("CALL") != name.npos) {
if (name.find("ADJ") != name.npos) {
// ignore (not a call)
CALL("dst");
}
}
-
+
if (name.find("RET") != name.npos) {
RETURN();
}
static int ARMFlagFromOpName(LiteralConstantEmitter *type,
const std::string &name) {
REG("GPR");
+ REG("rGPR");
REG("tcGPR");
REG("cc_out");
REG("s_cc_out");
REG("QPR");
REG("QQPR");
REG("QQQQPR");
-
+
IMM("i32imm");
+ IMM("movt_imm");
IMM("bf_inv_mask_imm");
IMM("jtblock_operand");
IMM("nohash_imm");
IMM("cpinst_operand");
+ IMM("setend_op");
IMM("cps_opt");
IMM("vfp_f64imm");
IMM("vfp_f32imm");
+ IMM("memb_opt");
IMM("msr_mask");
IMM("neg_zero");
IMM("imm0_31");
+ IMM("imm0_31_m1");
IMM("nModImm");
IMM("imm0_4095");
IMM("jt2block_operand");
IMM("t_imm_s4");
IMM("pclabel");
-
+ IMM("adrlabel");
+ IMM("shift_imm");
+ IMM("neon_vcvt_imm32");
+
MISC("brtarget", "kOperandTypeARMBranchTarget"); // ?
+ MISC("uncondbrtarget", "kOperandTypeARMBranchTarget"); // ?
+ MISC("t_brtarget", "kOperandTypeARMBranchTarget"); // ?
+ MISC("t_bcctarget", "kOperandTypeARMBranchTarget"); // ?
+ MISC("t_cbtarget", "kOperandTypeARMBranchTarget"); // ?
+ MISC("bltarget", "kOperandTypeARMBranchTarget"); // ?
+ MISC("t_bltarget", "kOperandTypeARMBranchTarget"); // ?
+ MISC("t_blxtarget", "kOperandTypeARMBranchTarget"); // ?
MISC("so_reg", "kOperandTypeARMSoReg"); // R, R, I
+ MISC("shift_so_reg", "kOperandTypeARMSoReg"); // R, R, I
MISC("t2_so_reg", "kOperandTypeThumb2SoReg"); // R, I
MISC("so_imm", "kOperandTypeARMSoImm"); // I
+ MISC("rot_imm", "kOperandTypeARMRotImm"); // I
MISC("t2_so_imm", "kOperandTypeThumb2SoImm"); // I
MISC("so_imm2part", "kOperandTypeARMSoImm2Part"); // I
MISC("pred", "kOperandTypeARMPredicate"); // I, R
MISC("it_pred", "kOperandTypeARMPredicate"); // I
+ MISC("addrmode_imm12", "kOperandTypeAddrModeImm12"); // R, I
+ MISC("ldst_so_reg", "kOperandTypeLdStSOReg"); // R, R, I
MISC("addrmode2", "kOperandTypeARMAddrMode2"); // R, R, I
MISC("am2offset", "kOperandTypeARMAddrMode2Offset"); // R, I
MISC("addrmode3", "kOperandTypeARMAddrMode3"); // R, R, I
MISC("am3offset", "kOperandTypeARMAddrMode3Offset"); // R, I
- MISC("addrmode4", "kOperandTypeARMAddrMode4"); // R, I
+ MISC("ldstm_mode", "kOperandTypeARMLdStmMode"); // I
MISC("addrmode5", "kOperandTypeARMAddrMode5"); // R, I
MISC("addrmode6", "kOperandTypeARMAddrMode6"); // R, R, I, I
MISC("am6offset", "kOperandTypeARMAddrMode6Offset"); // R, I, I
+ MISC("addrmode6dup", "kOperandTypeARMAddrMode6"); // R, R, I, I
MISC("addrmodepc", "kOperandTypeARMAddrModePC"); // R, I
MISC("reglist", "kOperandTypeARMRegisterList"); // I, R, ...
+ MISC("dpr_reglist", "kOperandTypeARMDPRRegisterList"); // I, R, ...
+ MISC("spr_reglist", "kOperandTypeARMSPRRegisterList"); // I, R, ...
MISC("it_mask", "kOperandTypeThumbITMask"); // I
MISC("t2addrmode_imm8", "kOperandTypeThumb2AddrModeImm8"); // R, I
MISC("t2am_imm8_offset", "kOperandTypeThumb2AddrModeImm8Offset");//I
MISC("t2addrmode_imm12", "kOperandTypeThumb2AddrModeImm12"); // R, I
MISC("t2addrmode_so_reg", "kOperandTypeThumb2AddrModeSoReg"); // R, R, I
MISC("t2addrmode_imm8s4", "kOperandTypeThumb2AddrModeImm8s4"); // R, I
- MISC("t2am_imm8s4_offset", "kOperandTypeThumb2AddrModeImm8s4Offset");
+ MISC("t2am_imm8s4_offset", "kOperandTypeThumb2AddrModeImm8s4Offset");
// R, I
MISC("tb_addrmode", "kOperandTypeARMTBAddrMode"); // I
MISC("t_addrmode_s1", "kOperandTypeThumbAddrModeS1"); // R, I, R
MISC("t_addrmode_s4", "kOperandTypeThumbAddrModeS4"); // R, I, R
MISC("t_addrmode_rr", "kOperandTypeThumbAddrModeRR"); // R, R
MISC("t_addrmode_sp", "kOperandTypeThumbAddrModeSP"); // R, I
-
+ MISC("t_addrmode_pc", "kOperandTypeThumbAddrModePC"); // R, I
+
return 1;
}
if (!inst.TheDef->isSubClassOf("InstARM") &&
!inst.TheDef->isSubClassOf("InstThumb"))
return;
-
+
unsigned int index;
- unsigned int numOperands = inst.OperandList.size();
-
+ unsigned int numOperands = inst.Operands.size();
+
if (numOperands > EDIS_MAX_OPERANDS) {
- errs() << "numOperands == " << numOperands << " > " <<
+ errs() << "numOperands == " << numOperands << " > " <<
EDIS_MAX_OPERANDS << '\n';
llvm_unreachable("Too many operands");
}
-
+
for (index = 0; index < numOperands; ++index) {
- const CodeGenInstruction::OperandInfo &operandInfo =
- inst.OperandList[index];
+ const CGIOperandList::OperandInfo &operandInfo = inst.Operands[index];
Record &rec = *operandInfo.Rec;
-
+
if (ARMFlagFromOpName(operandTypes[index], rec.getName())) {
errs() << "Operand type: " << rec.getName() << '\n';
errs() << "Operand name: " << operandInfo.Name << '\n';
- errs() << "Instruction mame: " << inst.TheDef->getName() << '\n';
+ errs() << "Instruction name: " << inst.TheDef->getName() << '\n';
llvm_unreachable("Unhandled type");
}
}
}
/// ARMExtractSemantics - Performs various checks on the name of an ARM
-/// instruction to determine what sort of an instruction it is and then adds
+/// instruction to determine what sort of an instruction it is and then adds
/// the appropriate flags to the instruction and its operands
///
/// @arg instType - A reference to the type for the instruction as a whole
FlagsConstantEmitter *(&operandFlags)[EDIS_MAX_OPERANDS],
const CodeGenInstruction &inst) {
const std::string &name = inst.TheDef->getName();
-
+
if (name == "tBcc" ||
name == "tB" ||
name == "t2Bcc" ||
name == "tCBNZ") {
BRANCH("target");
}
-
+
if (name == "tBLr9" ||
name == "BLr9_pred" ||
name == "tBLXi_r9" ||
name == "t2BXJ" ||
name == "BXJ") {
BRANCH("func");
-
+
unsigned opIndex;
- opIndex = inst.getOperandNamed("func");
+ opIndex = inst.Operands.getOperandNamed("func");
if (operandTypes[opIndex]->is("kOperandTypeImmediate"))
operandTypes[opIndex]->set("kOperandTypeARMBranchTarget");
}
#undef BRANCH
-/// populateInstInfo - Fills an array of InstInfos with information about each
+/// populateInstInfo - Fills an array of InstInfos with information about each
/// instruction in a target
///
/// @arg infoArray - The array of InstInfo objects to populate
CodeGenTarget &target) {
const std::vector<const CodeGenInstruction*> &numberedInstructions =
target.getInstructionsByEnumValue();
-
+
unsigned int index;
unsigned int numInstructions = numberedInstructions.size();
-
+
for (index = 0; index < numInstructions; ++index) {
const CodeGenInstruction& inst = *numberedInstructions[index];
-
+
CompoundConstantEmitter *infoStruct = new CompoundConstantEmitter;
infoArray.addEntry(infoStruct);
-
+
LiteralConstantEmitter *instType = new LiteralConstantEmitter;
infoStruct->addEntry(instType);
-
- LiteralConstantEmitter *numOperandsEmitter =
- new LiteralConstantEmitter(inst.OperandList.size());
+
+ LiteralConstantEmitter *numOperandsEmitter =
+ new LiteralConstantEmitter(inst.Operands.size());
infoStruct->addEntry(numOperandsEmitter);
-
+
CompoundConstantEmitter *operandTypeArray = new CompoundConstantEmitter;
infoStruct->addEntry(operandTypeArray);
-
+
LiteralConstantEmitter *operandTypes[EDIS_MAX_OPERANDS];
-
+
CompoundConstantEmitter *operandFlagArray = new CompoundConstantEmitter;
infoStruct->addEntry(operandFlagArray);
-
+
FlagsConstantEmitter *operandFlags[EDIS_MAX_OPERANDS];
-
- for (unsigned operandIndex = 0;
- operandIndex < EDIS_MAX_OPERANDS;
+
+ for (unsigned operandIndex = 0;
+ operandIndex < EDIS_MAX_OPERANDS;
++operandIndex) {
operandTypes[operandIndex] = new LiteralConstantEmitter;
operandTypeArray->addEntry(operandTypes[operandIndex]);
-
+
operandFlags[operandIndex] = new FlagsConstantEmitter;
operandFlagArray->addEntry(operandFlags[operandIndex]);
}
-
+
unsigned numSyntaxes = 0;
-
+
if (target.getName() == "X86") {
X86PopulateOperands(operandTypes, inst);
X86ExtractSemantics(*instType, operandFlags, inst);
ARMExtractSemantics(*instType, operandTypes, operandFlags, inst);
numSyntaxes = 1;
}
-
- CompoundConstantEmitter *operandOrderArray = new CompoundConstantEmitter;
-
+
+ CompoundConstantEmitter *operandOrderArray = new CompoundConstantEmitter;
+
infoStruct->addEntry(operandOrderArray);
-
- for (unsigned syntaxIndex = 0;
- syntaxIndex < EDIS_MAX_SYNTAXES;
+
+ for (unsigned syntaxIndex = 0;
+ syntaxIndex < EDIS_MAX_SYNTAXES;
++syntaxIndex) {
- CompoundConstantEmitter *operandOrder =
+ CompoundConstantEmitter *operandOrder =
new CompoundConstantEmitter(EDIS_MAX_OPERANDS);
-
+
operandOrderArray->addEntry(operandOrder);
-
+
if (syntaxIndex < numSyntaxes) {
populateOperandOrder(operandOrder, inst, syntaxIndex);
}
}
-
+
infoStruct = NULL;
}
}
operandTypes.addEntry("kOperandTypeARMBranchTarget");
operandTypes.addEntry("kOperandTypeARMSoReg");
operandTypes.addEntry("kOperandTypeARMSoImm");
+ operandTypes.addEntry("kOperandTypeARMRotImm");
operandTypes.addEntry("kOperandTypeARMSoImm2Part");
operandTypes.addEntry("kOperandTypeARMPredicate");
+ operandTypes.addEntry("kOperandTypeAddrModeImm12");
+ operandTypes.addEntry("kOperandTypeLdStSOReg");
operandTypes.addEntry("kOperandTypeARMAddrMode2");
operandTypes.addEntry("kOperandTypeARMAddrMode2Offset");
operandTypes.addEntry("kOperandTypeARMAddrMode3");
operandTypes.addEntry("kOperandTypeARMAddrMode3Offset");
- operandTypes.addEntry("kOperandTypeARMAddrMode4");
+ operandTypes.addEntry("kOperandTypeARMLdStmMode");
operandTypes.addEntry("kOperandTypeARMAddrMode5");
operandTypes.addEntry("kOperandTypeARMAddrMode6");
operandTypes.addEntry("kOperandTypeARMAddrMode6Offset");
operandTypes.addEntry("kOperandTypeARMAddrModePC");
operandTypes.addEntry("kOperandTypeARMRegisterList");
+ operandTypes.addEntry("kOperandTypeARMDPRRegisterList");
+ operandTypes.addEntry("kOperandTypeARMSPRRegisterList");
operandTypes.addEntry("kOperandTypeARMTBAddrMode");
operandTypes.addEntry("kOperandTypeThumbITMask");
operandTypes.addEntry("kOperandTypeThumbAddrModeS1");
operandTypes.addEntry("kOperandTypeThumbAddrModeS4");
operandTypes.addEntry("kOperandTypeThumbAddrModeRR");
operandTypes.addEntry("kOperandTypeThumbAddrModeSP");
+ operandTypes.addEntry("kOperandTypeThumbAddrModePC");
operandTypes.addEntry("kOperandTypeThumb2SoReg");
operandTypes.addEntry("kOperandTypeThumb2SoImm");
operandTypes.addEntry("kOperandTypeThumb2AddrModeImm8");
operandTypes.addEntry("kOperandTypeThumb2AddrModeImm8s4");
operandTypes.addEntry("kOperandTypeThumb2AddrModeImm8s4Offset");
operandTypes.emit(o, i);
-
+
o << "\n";
-
+
EnumEmitter operandFlags("OperandFlags");
operandFlags.addEntry("kOperandFlagSource");
operandFlags.addEntry("kOperandFlagTarget");
operandFlags.emitAsFlags(o, i);
-
+
o << "\n";
-
+
EnumEmitter instructionTypes("InstructionTypes");
instructionTypes.addEntry("kInstructionTypeNone");
instructionTypes.addEntry("kInstructionTypeMove");
instructionTypes.addEntry("kInstructionTypeCall");
instructionTypes.addEntry("kInstructionTypeReturn");
instructionTypes.emit(o, i);
-
+
o << "\n";
}
void EDEmitter::run(raw_ostream &o) {
unsigned int i = 0;
-
+
CompoundConstantEmitter infoArray;
- CodeGenTarget target;
-
+ CodeGenTarget target(Records);
+
populateInstInfo(infoArray, target);
-
+
emitCommonEnums(o, i);
-
+
o << "namespace {\n";
-
+
o << "llvm::EDInstInfo instInfo" << target.getName().c_str() << "[] = ";
infoArray.emit(o, i);
o << ";" << "\n";
-
- o << "}\n";
-}
-void EDEmitter::runHeader(raw_ostream &o) {
- EmitSourceFileHeader("Enhanced Disassembly Info Header", o);
-
- o << "#ifndef EDInfo_" << "\n";
- o << "#define EDInfo_" << "\n";
- o << "\n";
- o << "#define EDIS_MAX_OPERANDS " << format("%d", EDIS_MAX_OPERANDS) << "\n";
- o << "#define EDIS_MAX_SYNTAXES " << format("%d", EDIS_MAX_SYNTAXES) << "\n";
- o << "\n";
-
- unsigned int i = 0;
-
- emitCommonEnums(o, i);
-
- o << "\n";
- o << "#endif" << "\n";
+ o << "}\n";
}
projects / oota-llvm.git / blobdiff