Start the support for AVX instructions with 256-bit %ymm registers. A couple of

[oota-llvm.git] / utils / TableGen / FastISelEmitter.h

diff --git a/utils/TableGen/FastISelEmitter.h b/utils/TableGen/FastISelEmitter.h
index df6a0e655cce5807e2e5670bb7176327e6ec955f..ce4e77e6f8f240ef001967beb7e63f1ce8178fc0 100644 (file)
--- a/utils/TableGen/FastISelEmitter.h
+++ b/utils/TableGen/FastISelEmitter.h
@@ -19,6 +19,8 @@
 
 namespace llvm {
 
+class CodeGenTarget;
+
 /// FastISelEmitter - The top-level class which coordinates construction
 /// and emission of the instruction selector.
 ///
@@ -26,10 +28,10 @@ class FastISelEmitter : public TableGenBackend {
   RecordKeeper &Records;
   CodeGenDAGPatterns CGP;
 public:
-  explicit FastISelEmitter(RecordKeeper &R) : Records(R), CGP(R) {}
+  explicit FastISelEmitter(RecordKeeper &R);
 
   // run - Output the isel, returning true on failure.
-  void run(std::ostream &OS);
+  void run(raw_ostream &OS);
 };
 
 } // End llvm namespace