Rewrite tblgen handling of subtarget features so

[oota-llvm.git] / utils / TableGen / RegisterInfoEmitter.cpp

diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index bb510ca01d36e5d453a83e7a20497a577083cf2f..2552965ac9d7ce1873c08785b85f41bb799ca278 100644 (file)
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -2,8 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -52,17 +52,17 @@ void RegisterInfoEmitter::runHeader(std::ostream &OS) {
   const std::string &TargetName = Target.getName();
   std::string ClassName = TargetName + "GenRegisterInfo";
 
-  OS << "#include \"llvm/Target/MRegisterInfo.h\"\n";
+  OS << "#include \"llvm/Target/TargetRegisterInfo.h\"\n";
   OS << "#include <string>\n\n";
 
   OS << "namespace llvm {\n\n";
 
-  OS << "struct " << ClassName << " : public MRegisterInfo {\n"
+  OS << "struct " << ClassName << " : public TargetRegisterInfo {\n"
      << "  " << ClassName
      << "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n"
      << "  virtual int getDwarfRegNumFull(unsigned RegNum, "
      << "unsigned Flavour) const;\n"
-     << "  virtual int getDwarfRegNum(unsigned RegNum) const = 0;\n"
+     << "  virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const = 0;\n"
      << "  unsigned getSubReg(unsigned RegNo, unsigned Index) const;\n"
      << "};\n\n";
 
@@ -113,11 +113,10 @@ bool isSubRegisterClass(const CodeGenRegisterClass &RC,
 static void addSuperReg(Record *R, Record *S,
                         std::map<Record*, std::set<Record*> > &SubRegs,
                         std::map<Record*, std::set<Record*> > &SuperRegs,
-                        std::map<Record*, std::set<Record*> > &Aliases,
-                        RegisterInfoEmitter &RIE) {
+                        std::map<Record*, std::set<Record*> > &Aliases) {
   if (R == S) {
     cerr << "Error: recursive sub-register relationship between"
-         << " register " << RIE.getQualifiedName(R)
+         << " register " << getQualifiedName(R)
          << " and its sub-registers?\n";
     abort();
   }
@@ -129,30 +128,29 @@ static void addSuperReg(Record *R, Record *S,
   if (SuperRegs.count(S))
     for (std::set<Record*>::iterator I = SuperRegs[S].begin(),
            E = SuperRegs[S].end(); I != E; ++I)
-      addSuperReg(R, *I, SubRegs, SuperRegs, Aliases, RIE);
+      addSuperReg(R, *I, SubRegs, SuperRegs, Aliases);
 }
 
 static void addSubSuperReg(Record *R, Record *S,
                            std::map<Record*, std::set<Record*> > &SubRegs,
                            std::map<Record*, std::set<Record*> > &SuperRegs,
-                           std::map<Record*, std::set<Record*> > &Aliases,
-                           RegisterInfoEmitter &RIE) {
+                           std::map<Record*, std::set<Record*> > &Aliases) {
   if (R == S) {
     cerr << "Error: recursive sub-register relationship between"
-         << " register " << RIE.getQualifiedName(R)
+         << " register " << getQualifiedName(R)
          << " and its sub-registers?\n";
     abort();
   }
 
   if (!SubRegs[R].insert(S).second)
     return;
-  addSuperReg(S, R, SubRegs, SuperRegs, Aliases, RIE);
+  addSuperReg(S, R, SubRegs, SuperRegs, Aliases);
   Aliases[R].insert(S);
   Aliases[S].insert(R);
   if (SubRegs.count(S))
     for (std::set<Record*>::iterator I = SubRegs[S].begin(),
            E = SubRegs[S].end(); I != E; ++I)
-      addSubSuperReg(R, *I, SubRegs, SuperRegs, Aliases, RIE);
+      addSubSuperReg(R, *I, SubRegs, SuperRegs, Aliases);
 }
 
 // RegisterInfoEmitter::run - Main register file description emitter.
@@ -446,7 +444,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
              << " multiple times!\n";
       RegisterImmSubRegs[R].insert(SubReg);
       addSubSuperReg(R, SubReg, RegisterSubRegs, RegisterSuperRegs,
-                     RegisterAliases, *this);
+                     RegisterAliases);
     }
   }
 
@@ -590,7 +588,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
   // Emit the constructor of the class...
   OS << ClassName << "::" << ClassName
      << "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"
-     << "  : MRegisterInfo(RegisterDescriptors, " << Registers.size()+1
+     << "  : TargetRegisterInfo(RegisterDescriptors, " << Registers.size()+1
      << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n "
      << "                 CallFrameSetupOpcode, CallFrameDestroyOpcode) {}\n\n";
 
@@ -601,7 +599,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
   for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
     Record *Reg = Registers[i].TheDef;
     std::vector<int> RegNums = Reg->getValueAsListOfInts("DwarfNumbers");
-    maxLength = std::max(maxLength, RegNums.size());
+    maxLength = std::max((size_t)maxLength, RegNums.size());
     if (DwarfRegNums.count(Reg))
       cerr << "Warning: DWARF numbers for register " << getQualifiedName(Reg)
            << "specified multiple times\n";