//
// The LLVM Compiler Infrastructure
//
-// This file was developed by James M. Laskey and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
#include <algorithm>
using namespace llvm;
-//
-// Record sort by name function.
-//
-struct LessRecord {
- bool operator()(const Record *Rec1, const Record *Rec2) const {
- return Rec1->getName() < Rec2->getName();
- }
-};
-
-//
-// Record sort by field "Name" function.
-//
-struct LessRecordFieldName {
- bool operator()(const Record *Rec1, const Record *Rec2) const {
- return Rec1->getValueAsString("Name") < Rec2->getValueAsString("Name");
- }
-};
-
//
// Enumeration - Emit the specified class as an enumeration.
//
bool isBits) {
// Get all records of class and sort
std::vector<Record*> DefList = Records.getAllDerivedDefinitions(ClassName);
- sort(DefList.begin(), DefList.end(), LessRecord());
+ std::sort(DefList.begin(), DefList.end(), LessRecord());
// Open enumeration
OS << "enum {\n";
Record *Def = DefList[i];
// Get and emit name
- std::string Name = Def->getName();
- OS << " " << Name;
+ OS << " " << Def->getName();
// If bit flags then emit expression (1 << i)
if (isBits) OS << " = " << " 1 << " << i;
- // Depending on if more in the list emit comma
+ // Depending on 'if more in the list' emit comma
if (++i < N) OS << ",";
OS << "\n";
}
//
-// FeatureKeyValues - Emit data of all the subtarget features. Used by command
-// line.
+// FeatureKeyValues - Emit data of all the subtarget features. Used by the
+// command line.
//
void SubtargetEmitter::FeatureKeyValues(std::ostream &OS) {
// Gather and sort all the features
std::vector<Record*> FeatureList =
Records.getAllDerivedDefinitions("SubtargetFeature");
- sort(FeatureList.begin(), FeatureList.end(), LessRecord());
+ std::sort(FeatureList.begin(), FeatureList.end(), LessRecordFieldName());
// Begin feature table
OS << "// Sorted (by key) array of values for CPU features.\n"
- << "static llvm::SubtargetFeatureKV FeatureKV[] = {\n";
+ << "static const llvm::SubtargetFeatureKV FeatureKV[] = {\n";
// For each feature
- for (unsigned i = 0, N = FeatureList.size(); i < N;) {
+ for (unsigned i = 0, N = FeatureList.size(); i < N; ++i) {
// Next feature
Record *Feature = FeatureList[i];
- std::string Name = Feature->getName();
- std::string CommandLineName = Feature->getValueAsString("Name");
- std::string Desc = Feature->getValueAsString("Desc");
+ const std::string &Name = Feature->getName();
+ const std::string &CommandLineName = Feature->getValueAsString("Name");
+ const std::string &Desc = Feature->getValueAsString("Desc");
- // Emit as { "feature", "decription", feactureEnum }
+ if (CommandLineName.empty()) continue;
+
+ // Emit as { "feature", "decription", feactureEnum, i1 | i2 | ... | in }
OS << " { "
<< "\"" << CommandLineName << "\", "
<< "\"" << Desc << "\", "
- << Name
- << " }";
+ << Name << ", ";
+
+ const std::vector<Record*> &ImpliesList =
+ Feature->getValueAsListOfDefs("Implies");
- // Depending on if more in the list emit comma
- if (++i < N) OS << ",";
+ if (ImpliesList.empty()) {
+ OS << "0";
+ } else {
+ for (unsigned j = 0, M = ImpliesList.size(); j < M;) {
+ OS << ImpliesList[j]->getName();
+ if (++j < M) OS << " | ";
+ }
+ }
+
+ OS << " }";
+
+ // Depending on 'if more in the list' emit comma
+ if ((i + 1) < N) OS << ",";
OS << "\n";
}
// Gather and sort processor information
std::vector<Record*> ProcessorList =
Records.getAllDerivedDefinitions("Processor");
- sort(ProcessorList.begin(), ProcessorList.end(), LessRecordFieldName());
+ std::sort(ProcessorList.begin(), ProcessorList.end(), LessRecordFieldName());
// Begin processor table
OS << "// Sorted (by key) array of values for CPU subtype.\n"
// Next processor
Record *Processor = ProcessorList[i];
- std::string Name = Processor->getValueAsString("Name");
- std::vector<Record*> FeatureList = Processor->getValueAsListDef("Features");
+ const std::string &Name = Processor->getValueAsString("Name");
+ const std::vector<Record*> &FeatureList =
+ Processor->getValueAsListOfDefs("Features");
// Emit as { "cpu", "description", f1 | f2 | ... fn },
OS << " { "
OS << "0";
} else {
for (unsigned j = 0, M = FeatureList.size(); j < M;) {
- Record *Feature = FeatureList[j];
- std::string Name = Feature->getName();
- OS << Name;
+ OS << FeatureList[j]->getName();
if (++j < M) OS << " | ";
}
}
- OS << " }";
+ // The "0" is for the "implies" section of this data structure.
+ OS << ", 0 }";
- // Depending on if more in the list emit comma
+ // Depending on 'if more in the list' emit comma
if (++i < N) OS << ",";
OS << "\n";
// CollectAllItinClasses - Gathers and enumerates all the itinerary classes.
// Returns itinerary class count.
//
-unsigned SubtargetEmitter::CollectAllItinClasses(std::map<std::string, unsigned>
- &ItinClassesMap) {
+unsigned SubtargetEmitter::CollectAllItinClasses(std::ostream &OS,
+ std::map<std::string, unsigned> &ItinClassesMap) {
// Gather and sort all itinerary classes
std::vector<Record*> ItinClassList =
Records.getAllDerivedDefinitions("InstrItinClass");
- sort(ItinClassList.begin(), ItinClassList.end(), LessRecord());
+ std::sort(ItinClassList.begin(), ItinClassList.end(), LessRecord());
// For each itinerary class
unsigned N = ItinClassList.size();
for (unsigned i = 0; i < N; i++) {
// Next itinerary class
- Record *ItinClass = ItinClassList[i];
+ const Record *ItinClass = ItinClassList[i];
// Get name of itinerary class
- std::string Name = ItinClass->getName();
// Assign itinerary class a unique number
- ItinClassesMap[Name] = i;
+ ItinClassesMap[ItinClass->getName()] = i;
}
+ // Emit size of table
+ OS<<"\nenum {\n";
+ OS<<" ItinClassesSize = " << N << "\n";
+ OS<<"};\n";
+
// Return itinerary class count
return N;
}
std::string &ItinString,
unsigned &NStages) {
// Get states list
- std::vector<Record*> StageList = ItinData->getValueAsListDef("Stages");
+ const std::vector<Record*> &StageList =
+ ItinData->getValueAsListOfDefs("Stages");
// For each stage
unsigned N = NStages = StageList.size();
- for (unsigned i = 0; i < N; i++) {
+ for (unsigned i = 0; i < N;) {
// Next stage
- Record *Stage = StageList[i];
+ const Record *Stage = StageList[i];
// Form string as ,{ cycles, u1 | u2 | ... | un }
int Cycles = Stage->getValueAsInt("Cycles");
- ItinString += " ,{ " + itostr(Cycles) + ", ";
+ ItinString += " { " + itostr(Cycles) + ", ";
// Get unit list
- std::vector<Record*> UnitList = Stage->getValueAsListDef("Units");
+ const std::vector<Record*> &UnitList = Stage->getValueAsListOfDefs("Units");
// For each unit
for (unsigned j = 0, M = UnitList.size(); j < M;) {
- // Next unit
- Record *Unit = UnitList[j];
-
// Add name and bitwise or
- ItinString += Unit->getName();
+ ItinString += UnitList[j]->getName();
if (++j < M) ItinString += " | ";
}
// Close off stage
ItinString += " }";
+ if (++i < N) ItinString += ", ";
}
}
if (ProcItinList.size() < 2) return;
// Begin stages table
- OS << "static llvm::InstrStage Stages[] = {\n"
- " { 0, 0 } // No itinerary\n";
+ OS << "static const llvm::InstrStage Stages[] = {\n"
+ " { 0, 0 }, // No itinerary\n";
+ unsigned StageCount = 1;
unsigned ItinEnum = 1;
std::map<std::string, unsigned> ItinMap;
for (unsigned i = 0, N = ProcItinList.size(); i < N; i++) {
Record *Proc = ProcItinList[i];
// Get processor itinerary name
- std::string Name = Proc->getName();
+ const std::string &Name = Proc->getName();
// Skip default
if (Name == "NoItineraries") continue;
ItinList.resize(NItinClasses);
// Get itinerary data list
- std::vector<Record*> ItinDataList = Proc->getValueAsListDef("IID");
+ std::vector<Record*> ItinDataList = Proc->getValueAsListOfDefs("IID");
// For each itinerary data
for (unsigned j = 0, M = ItinDataList.size(); j < M; j++) {
// If new itinerary
if (Find == 0) {
- // Emit as ,{ cycles, u1 | u2 | ... | un } // index
- OS << ItinString << " // " << ItinEnum << "\n";
- ItinMap[ItinString] = Find = ItinEnum++;
+ // Emit as { cycles, u1 | u2 | ... | un }, // index
+ OS << ItinString << ", // " << ItinEnum << "\n";
+ // Record Itin class number.
+ ItinMap[ItinString] = Find = StageCount;
+ StageCount += NStages;
+ ItinEnum++;
}
// Set up itinerary as location and location + stage count
InstrItinerary Intinerary = { Find, Find + NStages };
// Locate where to inject into processor itinerary table
- std::string Name = ItinData->getValueAsDef("TheClass")->getName();
+ const std::string &Name = ItinData->getValueAsDef("TheClass")->getName();
Find = ItinClassesMap[Name];
// Inject - empty slots will be 0, 0
ProcList.push_back(ItinList);
}
+ // Closing stage
+ OS << " { 0, 0 } // End itinerary\n";
// End stages table
OS << "};\n";
+
+ // Emit size of table
+ OS<<"\nenum {\n";
+ OS<<" StagesSize = sizeof(Stages)/sizeof(llvm::InstrStage)\n";
+ OS<<"};\n";
}
//
-// EmitProcessData - Generate data for processor itineraries.
+// EmitProcessorData - Generate data for processor itineraries.
//
-void SubtargetEmitter::EmitProcessData(std::ostream &OS,
+void SubtargetEmitter::EmitProcessorData(std::ostream &OS,
std::vector<std::vector<InstrItinerary> > &ProcList) {
// Get an iterator for processor itinerary stages
std::vector<std::vector<InstrItinerary> >::iterator
Record *Itin = Itins[i];
// Get processor itinerary name
- std::string Name = Itin->getName();
+ const std::string &Name = Itin->getName();
// Skip default
if (Name == "NoItineraries") continue;
// Begin processor itinerary table
OS << "\n";
- OS << "static llvm::InstrItinerary " << Name << "[] = {\n";
+ OS << "static const llvm::InstrItinerary " << Name << "[] = {\n";
// For each itinerary class
std::vector<InstrItinerary> &ItinList = *ProcListIter++;
- unsigned ItinIndex = 0;
for (unsigned j = 0, M = ItinList.size(); j < M;) {
InstrItinerary &Intinerary = ItinList[j];
}
}
+//
+// EmitProcessorLookup - generate cpu name to itinerary lookup table.
+//
+void SubtargetEmitter::EmitProcessorLookup(std::ostream &OS) {
+ // Gather and sort processor information
+ std::vector<Record*> ProcessorList =
+ Records.getAllDerivedDefinitions("Processor");
+ std::sort(ProcessorList.begin(), ProcessorList.end(), LessRecordFieldName());
+
+ // Begin processor table
+ OS << "\n";
+ OS << "// Sorted (by key) array of itineraries for CPU subtype.\n"
+ << "static const llvm::SubtargetInfoKV ProcItinKV[] = {\n";
+
+ // For each processor
+ for (unsigned i = 0, N = ProcessorList.size(); i < N;) {
+ // Next processor
+ Record *Processor = ProcessorList[i];
+
+ const std::string &Name = Processor->getValueAsString("Name");
+ const std::string &ProcItin =
+ Processor->getValueAsDef("ProcItin")->getName();
+
+ // Emit as { "cpu", procinit },
+ OS << " { "
+ << "\"" << Name << "\", "
+ << "(void *)&" << ProcItin;
+
+ OS << " }";
+
+ // Depending on ''if more in the list'' emit comma
+ if (++i < N) OS << ",";
+
+ OS << "\n";
+ }
+
+ // End processor table
+ OS << "};\n";
+
+ // Emit size of table
+ OS<<"\nenum {\n";
+ OS<<" ProcItinKVSize = sizeof(ProcItinKV)/"
+ "sizeof(llvm::SubtargetInfoKV)\n";
+ OS<<"};\n";
+}
+
//
// EmitData - Emits all stages and itineries, folding common patterns.
//
std::vector<std::vector<InstrItinerary> > ProcList;
// Enumerate all the itinerary classes
- unsigned NItinClasses = CollectAllItinClasses(ItinClassesMap);
- // Emit the stage data
- EmitStageData(OS, NItinClasses, ItinClassesMap, ProcList);
- // Emit the processor itinerary data
- EmitProcessData(OS, ProcList);
+ unsigned NItinClasses = CollectAllItinClasses(OS, ItinClassesMap);
+ // Make sure the rest is worth the effort
+ HasItineraries = NItinClasses != 1; // Ignore NoItinerary.
+
+ if (HasItineraries) {
+ // Emit the stage data
+ EmitStageData(OS, NItinClasses, ItinClassesMap, ProcList);
+ // Emit the processor itinerary data
+ EmitProcessorData(OS, ProcList);
+ // Emit the processor lookup data
+ EmitProcessorLookup(OS);
+ }
}
//
void SubtargetEmitter::ParseFeaturesFunction(std::ostream &OS) {
std::vector<Record*> Features =
Records.getAllDerivedDefinitions("SubtargetFeature");
- sort(Features.begin(), Features.end(), LessRecord());
+ std::sort(Features.begin(), Features.end(), LessRecord());
OS << "// ParseSubtargetFeatures - Parses features string setting specified\n"
- "// subtarget options.\n"
- "void llvm::";
+ << "// subtarget options.\n"
+ << "void llvm::";
OS << Target;
OS << "Subtarget::ParseSubtargetFeatures(const std::string &FS,\n"
- " const std::string &CPU) {\n"
- " SubtargetFeatures Features(FS);\n"
- " Features.setCPUIfNone(CPU);\n"
- " uint32_t Bits = Features.getBits(SubTypeKV, SubTypeKVSize,\n"
- " FeatureKV, FeatureKVSize);\n";
-
+ << " const std::string &CPU) {\n"
+ << " SubtargetFeatures Features(FS);\n"
+ << " Features.setCPUIfNone(CPU);\n"
+ << " uint32_t Bits = Features.getBits(SubTypeKV, SubTypeKVSize,\n"
+ << " FeatureKV, FeatureKVSize);\n";
+
for (unsigned i = 0; i < Features.size(); i++) {
// Next record
Record *R = Features[i];
- std::string Instance = R->getName();
- std::string Name = R->getValueAsString("Name");
- std::string Type = R->getValueAsString("Type");
- std::string Attribute = R->getValueAsString("Attribute");
-
- OS << " " << Attribute << " = (Bits & " << Instance << ") != 0;\n";
+ const std::string &Instance = R->getName();
+ const std::string &Value = R->getValueAsString("Value");
+ const std::string &Attribute = R->getValueAsString("Attribute");
+
+ if (Value=="true" || Value=="false")
+ OS << " if ((Bits & " << Instance << ") != 0) "
+ << Attribute << " = " << Value << ";\n";
+ else
+ OS << " if ((Bits & " << Instance << ") != 0 && " << Attribute <<
+ " < " << Value << ") " << Attribute << " = " << Value << ";\n";
+ }
+
+ if (HasItineraries) {
+ OS << "\n"
+ << " InstrItinerary *Itinerary = (InstrItinerary *)"
+ << "Features.getInfo(ProcItinKV, ProcItinKVSize);\n"
+ << " InstrItins = InstrItineraryData(Stages, Itinerary);\n";
}
+
OS << "}\n";
}
projects / oota-llvm.git / blobdiff