Taints the non-acquire RMW's store address with the load part

[oota-llvm.git] / utils / TableGen / X86DisassemblerShared.h

diff --git a/utils/TableGen/X86DisassemblerShared.h b/utils/TableGen/X86DisassemblerShared.h
index 2d3d3fc1bcbb92d67dcecd4b05e46aea1bdd0d35..e5889e92415df4fec92b1efd11308848be050f19 100644 (file)
--- a/utils/TableGen/X86DisassemblerShared.h
+++ b/utils/TableGen/X86DisassemblerShared.h
@@ -7,22 +7,17 @@
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef X86DISASSEMBLERSHARED_H
-#define X86DISASSEMBLERSHARED_H
+#ifndef LLVM_UTILS_TABLEGEN_X86DISASSEMBLERSHARED_H
+#define LLVM_UTILS_TABLEGEN_X86DISASSEMBLERSHARED_H
 
-#include <string.h>
+#include <cstring>
 #include <string>
 
-#define INSTRUCTION_IDS           \
-  InstrUID   instructionIDs[256];
-
 #include "../../lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h"
 
-#undef INSTRUCTION_SPECIFIER_FIELDS
-#undef INSTRUCTION_IDS
-
 struct InstructionSpecifier {
-  llvm::X86Disassembler::OperandSpecifier operands[X86_MAX_OPERANDS];
+  llvm::X86Disassembler::OperandSpecifier
+      operands[llvm::X86Disassembler::X86_MAX_OPERANDS];
   llvm::X86Disassembler::InstructionContext insnContext;
   std::string name;
 
@@ -33,4 +28,27 @@ struct InstructionSpecifier {
   }
 };
 
+/// Specifies whether a ModR/M byte is needed and (if so) which
+/// instruction each possible value of the ModR/M byte corresponds to. Once
+/// this information is known, we have narrowed down to a single instruction.
+struct ModRMDecision {
+  uint8_t modrm_type;
+  llvm::X86Disassembler::InstrUID instructionIDs[256];
+};
+
+/// Specifies which set of ModR/M->instruction tables to look at
+/// given a particular opcode.
+struct OpcodeDecision {
+  ModRMDecision modRMDecisions[256];
+};
+
+/// Specifies which opcode->instruction tables to look at given
+/// a particular context (set of attributes).  Since there are many possible
+/// contexts, the decoder first uses CONTEXTS_SYM to determine which context
+/// applies given a specific set of attributes.  Hence there are only IC_max
+/// entries in this table, rather than 2^(ATTR_max).
+struct ContextDecision {
+  OpcodeDecision opcodeDecisions[llvm::X86Disassembler::IC_max];
+};
+
 #endif