X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;ds=sidebyside;f=lib%2FCodeGen%2FSimpleRegisterCoalescing.cpp;h=bc833633ed24f05cb43fa5458e1605b02ee6e3b3;hb=b3db9c90d24682340f043a8151063128fe3b220b;hp=8916d9a9c5fdc253bdd5f2bfed058772a88f9262;hpb=f4ea5103714fdb7ff9f88df6fd6325e8bef48e19;p=oota-llvm.git diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index 8916d9a9c5f..bc833633ed2 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -17,7 +17,6 @@ #include "VirtRegMap.h" #include "llvm/CodeGen/LiveIntervalAnalysis.h" #include "llvm/Value.h" -#include "llvm/CodeGen/LiveVariables.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineLoopInfo.h" @@ -36,6 +35,7 @@ using namespace llvm; STATISTIC(numJoins , "Number of interval joins performed"); +STATISTIC(numSubJoins , "Number of subclass joins performed"); STATISTIC(numCommutes , "Number of instruction commuting performed"); STATISTIC(numExtends , "Number of copies extended"); STATISTIC(numPeep , "Number of identity moves eliminated after coalescing"); @@ -49,8 +49,13 @@ EnableJoining("join-liveintervals", static cl::opt NewHeuristic("new-coalescer-heuristic", - cl::desc("Use new coalescer heuristic"), - cl::init(false)); + cl::desc("Use new coalescer heuristic"), + cl::init(false), cl::Hidden); + +static cl::opt +CrossClassJoin("join-subclass-copies", + cl::desc("Coalesce copies to sub- register class"), + cl::init(false), cl::Hidden); static RegisterPass X("simple-register-coalescing", "Simple Register Coalescing"); @@ -66,7 +71,6 @@ void SimpleRegisterCoalescing::getAnalysisUsage(AnalysisUsage &AU) const { AU.addPreservedID(MachineDominatorsID); AU.addPreservedID(PHIEliminationID); AU.addPreservedID(TwoAddressInstructionPassID); - AU.addRequired(); AU.addRequired(); AU.addRequired(); MachineFunctionPass::getAnalysisUsage(AU); @@ -383,10 +387,21 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA, // simply extend BLR if CopyMI doesn't end the range. DOUT << "\nExtending: "; IntB.print(DOUT, tri_); - IntB.removeValNo(BValNo); + // Remove val#'s defined by copies that will be coalesced away. for (unsigned i = 0, e = BDeadValNos.size(); i != e; ++i) IntB.removeValNo(BDeadValNos[i]); - VNInfo *ValNo = IntB.getNextValue(AValNo->def, 0, li_->getVNInfoAllocator()); + + // Extend BValNo by merging in IntA live ranges of AValNo. Val# definition + // is updated. Kills are also updated. + VNInfo *ValNo = BValNo; + ValNo->def = AValNo->def; + ValNo->copy = NULL; + for (unsigned j = 0, ee = ValNo->kills.size(); j != ee; ++j) { + unsigned Kill = ValNo->kills[j]; + if (Kill != BLR->end) + BKills.push_back(Kill); + } + ValNo->kills.clear(); for (LiveInterval::iterator AI = IntA.begin(), AE = IntA.end(); AI != AE; ++AI) { if (AI->valno != AValNo) continue; @@ -428,7 +443,7 @@ bool SimpleRegisterCoalescing::isBackEdgeCopy(MachineInstr *CopyMI, LI.FindLiveRangeContaining(li_->getDefIndex(DefIdx)); if (DstLR == LI.end()) return false; - unsigned KillIdx = li_->getInstructionIndex(&MBB->back()) + InstrSlots::NUM; + unsigned KillIdx = li_->getMBBEndIdx(MBB) + 1; if (DstLR->valno->kills.size() == 1 && DstLR->valno->kills[0] == KillIdx && DstLR->valno->hasPHIKill) return true; @@ -751,7 +766,7 @@ bool SimpleRegisterCoalescing::CanCoalesceWithImpDef(MachineInstr *CopyMI, /// identity copies so they will be removed. void SimpleRegisterCoalescing::RemoveCopiesFromValNo(LiveInterval &li, VNInfo *VNI) { - MachineInstr *ImpDef = NULL; + SmallVector ImpDefs; MachineOperand *LastUse = NULL; unsigned LastUseIdx = li_->getUseIndex(VNI->def); for (MachineRegisterInfo::reg_iterator RI = mri_->reg_begin(li.reg), @@ -761,8 +776,7 @@ void SimpleRegisterCoalescing::RemoveCopiesFromValNo(LiveInterval &li, ++RI; if (MO->isDef()) { if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) { - assert(!ImpDef && "Multiple implicit_def defining same register?"); - ImpDef = MI; + ImpDefs.push_back(MI); } continue; } @@ -790,9 +804,13 @@ void SimpleRegisterCoalescing::RemoveCopiesFromValNo(LiveInterval &li, if (LastUse) LastUse->setIsKill(); else { - // Remove dead implicit_def. - li_->RemoveMachineInstrFromMaps(ImpDef); - ImpDef->eraseFromParent(); + // Remove dead implicit_def's. + while (!ImpDefs.empty()) { + MachineInstr *ImpDef = ImpDefs.back(); + ImpDefs.pop_back(); + li_->RemoveMachineInstrFromMaps(ImpDef); + ImpDef->eraseFromParent(); + } } } @@ -806,6 +824,41 @@ static unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, return 0; } +/// isProfitableToCoalesceToSubRC - Given that register class of DstReg is +/// a subset of the register class of SrcReg, return true if it's profitable +/// to coalesce the two registers. +bool +SimpleRegisterCoalescing::isProfitableToCoalesceToSubRC(unsigned SrcReg, + unsigned DstReg, + MachineBasicBlock *MBB){ + if (!CrossClassJoin) + return false; + + // First let's make sure all uses are in the same MBB. + for (MachineRegisterInfo::reg_iterator RI = mri_->reg_begin(SrcReg), + RE = mri_->reg_end(); RI != RE; ++RI) { + MachineInstr &MI = *RI; + if (MI.getParent() != MBB) + return false; + } + for (MachineRegisterInfo::reg_iterator RI = mri_->reg_begin(DstReg), + RE = mri_->reg_end(); RI != RE; ++RI) { + MachineInstr &MI = *RI; + if (MI.getParent() != MBB) + return false; + } + + // Then make sure the intervals are *short*. + LiveInterval &SrcInt = li_->getInterval(SrcReg); + LiveInterval &DstInt = li_->getInterval(DstReg); + unsigned SrcSize = SrcInt.getSize() / InstrSlots::NUM; + unsigned DstSize = DstInt.getSize() / InstrSlots::NUM; + const TargetRegisterClass *RC = mri_->getRegClass(DstReg); + unsigned Threshold = allocatableRCRegs_[RC].count() * 2; + return (SrcSize + DstSize) <= Threshold; +} + + /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg, /// which are the src/dst of the copy instruction CopyMI. This returns true /// if the copy was successfully coalesced away. If it is not currently @@ -866,6 +919,9 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { return false; // Not coalescable. } + // Should be non-null only when coalescing to a sub-register class. + const TargetRegisterClass *SubRC = NULL; + MachineBasicBlock *CopyMBB = CopyMI->getParent(); unsigned RealDstReg = 0; unsigned RealSrcReg = 0; if (isExtSubReg || isInsSubReg) { @@ -940,7 +996,8 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { unsigned OldSubIdx = isExtSubReg ? CopyMI->getOperand(0).getSubReg() : CopyMI->getOperand(2).getSubReg(); if (OldSubIdx) { - if (OldSubIdx == SubIdx && !differingRegisterClasses(SrcReg, DstReg)) + if (OldSubIdx == SubIdx && + !differingRegisterClasses(SrcReg, DstReg, SubRC)) // r1024<2> = EXTRACT_SUBREG r1025, 2. Then r1024 has already been // coalesced to a larger register so the subreg indices cancel out. // Also check if the other larger register is of the same register @@ -964,17 +1021,17 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { // if this will cause a high use density interval to target a smaller // set of registers. if (SmallRegSize > Threshold || LargeRegSize > Threshold) { - LiveVariables::VarInfo &svi = lv_->getVarInfo(LargeReg); - LiveVariables::VarInfo &dvi = lv_->getVarInfo(SmallReg); - if ((float)dvi.NumUses / SmallRegSize < - (float)svi.NumUses / LargeRegSize) { + if ((float)std::distance(mri_->use_begin(SmallReg), + mri_->use_end()) / SmallRegSize < + (float)std::distance(mri_->use_begin(LargeReg), + mri_->use_end()) / LargeRegSize) { Again = true; // May be possible to coalesce later. return false; } } } } - } else if (differingRegisterClasses(SrcReg, DstReg)) { + } else if (differingRegisterClasses(SrcReg, DstReg, SubRC)) { // FIXME: What if the resul of a EXTRACT_SUBREG is then coalesced // with another? If it's the resulting destination register, then // the subidx must be propagated to uses (but only those defined @@ -982,14 +1039,16 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { // register, it should be safe because register is assumed to have // the register class of the super-register. - // If they are not of the same register class, we cannot join them. - DOUT << "\tSrc/Dest are different register classes.\n"; - // Allow the coalescer to try again in case either side gets coalesced to - // a physical register that's compatible with the other side. e.g. - // r1024 = MOV32to32_ r1025 - // but later r1024 is assigned EAX then r1025 may be coalesced with EAX. - Again = true; // May be possible to coalesce later. - return false; + if (!SubRC || !isProfitableToCoalesceToSubRC(SrcReg, DstReg, CopyMBB)) { + // If they are not of the same register class, we cannot join them. + DOUT << "\tSrc/Dest are different register classes.\n"; + // Allow the coalescer to try again in case either side gets coalesced to + // a physical register that's compatible with the other side. e.g. + // r1024 = MOV32to32_ r1025 + // but later r1024 is assigned EAX then r1025 may be coalesced with EAX. + Again = true; // May be possible to coalesce later. + return false; + } } LiveInterval &SrcInt = li_->getInterval(SrcReg); @@ -1023,9 +1082,9 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { // do not join them, instead mark the physical register as its allocation // preference. unsigned Length = JoinVInt.getSize() / InstrSlots::NUM; - LiveVariables::VarInfo &vi = lv_->getVarInfo(JoinVReg); if (Length > Threshold && - (((float)vi.NumUses / Length) < (1.0 / Threshold))) { + (((float)std::distance(mri_->use_begin(JoinVReg), + mri_->use_end()) / Length) < (1.0 / Threshold))) { JoinVInt.preference = JoinPReg; ++numAborts; DOUT << "\tMay tie down a physical register, abort!\n"; @@ -1108,11 +1167,6 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { for (const unsigned *AS = tri_->getSubRegisters(DstReg); *AS; ++AS) li_->getOrCreateInterval(*AS).MergeInClobberRanges(*ResSrcInt, li_->getVNInfoAllocator()); - } else { - // Merge use info if the destination is a virtual register. - LiveVariables::VarInfo& dVI = lv_->getVarInfo(DstReg); - LiveVariables::VarInfo& sVI = lv_->getVarInfo(SrcReg); - dVI.NumUses += sVI.NumUses; } // If this is a EXTRACT_SUBREG, make sure the result of coalescing is the @@ -1125,6 +1179,13 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { } } + // Coalescing to a virtual register that is of a sub-register class of the + // other. Make sure the resulting register is set to the right register class. + if (SubRC) { + mri_->setRegClass(DstReg, SubRC); + ++numSubJoins; + } + if (NewHeuristic) { // Add all copies that define val# in the source interval into the queue. for (LiveInterval::const_vni_iterator i = ResSrcInt->vni_begin(), @@ -1137,7 +1198,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { if (CopyMI && JoinedCopies.count(CopyMI) == 0 && tii_->isMoveInstr(*CopyMI, NewSrcReg, NewDstReg)) { - unsigned LoopDepth = loopInfo->getLoopDepth(CopyMI->getParent()); + unsigned LoopDepth = loopInfo->getLoopDepth(CopyMBB); JoinQueue->push(CopyRec(CopyMI, LoopDepth, isBackEdgeCopy(CopyMI, DstReg))); } @@ -1868,9 +1929,13 @@ void SimpleRegisterCoalescing::joinIntervals() { } /// Return true if the two specified registers belong to different register -/// classes. The registers may be either phys or virt regs. -bool SimpleRegisterCoalescing::differingRegisterClasses(unsigned RegA, - unsigned RegB) const { +/// classes. The registers may be either phys or virt regs. In the +/// case where both registers are virtual registers, it would also returns +/// true by reference the RegB register class in SubRC if it is a subset of +/// RegA's register class. +bool +SimpleRegisterCoalescing::differingRegisterClasses(unsigned RegA, unsigned RegB, + const TargetRegisterClass *&SubRC) const { // Get the register classes for the first reg. if (TargetRegisterInfo::isPhysicalRegister(RegA)) { @@ -1880,11 +1945,15 @@ bool SimpleRegisterCoalescing::differingRegisterClasses(unsigned RegA, } // Compare against the regclass for the second reg. - const TargetRegisterClass *RegClass = mri_->getRegClass(RegA); - if (TargetRegisterInfo::isVirtualRegister(RegB)) - return RegClass != mri_->getRegClass(RegB); - else - return !RegClass->contains(RegB); + const TargetRegisterClass *RegClassA = mri_->getRegClass(RegA); + if (TargetRegisterInfo::isVirtualRegister(RegB)) { + const TargetRegisterClass *RegClassB = mri_->getRegClass(RegB); + if (RegClassA == RegClassB) + return false; + SubRC = (RegClassA->hasSubClass(RegClassB)) ? RegClassB : NULL; + return true; + } + return !RegClassA->contains(RegB); } /// lastRegisterUse - Returns the last use of the specific register between @@ -2008,7 +2077,6 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) { tri_ = tm_->getRegisterInfo(); tii_ = tm_->getInstrInfo(); li_ = &getAnalysis(); - lv_ = &getAnalysis(); loopInfo = &getAnalysis(); DOUT << "********** SIMPLE REGISTER COALESCING **********\n"