X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;ds=sidebyside;f=utils%2FTableGen%2FInstrInfoEmitter.h;h=abb1c6bc188cbd94e9ee7c15cb9ec6153dcdb0ea;hb=867fe8570f299a058f155f98646d85cabc27155b;hp=27cf429fb91e6b25e9678492d056eeab2babec7c;hpb=3060910e290949a9ac5eda8726d030790c4d60ff;p=oota-llvm.git diff --git a/utils/TableGen/InstrInfoEmitter.h b/utils/TableGen/InstrInfoEmitter.h index 27cf429fb91..abb1c6bc188 100644 --- a/utils/TableGen/InstrInfoEmitter.h +++ b/utils/TableGen/InstrInfoEmitter.h @@ -16,6 +16,7 @@ #define INSTRINFO_EMITTER_H #include "TableGenBackend.h" +#include "CodeGenDAGPatterns.h" #include #include @@ -28,30 +29,36 @@ class CodeGenInstruction; class InstrInfoEmitter : public TableGenBackend { RecordKeeper &Records; - bool IsItineraries; + CodeGenDAGPatterns CDP; std::map ItinClassMap; public: - InstrInfoEmitter(RecordKeeper &R) : Records(R), IsItineraries(false) {} + InstrInfoEmitter(RecordKeeper &R) : Records(R), CDP(R) { } // run - Output the instruction set description, returning true on failure. - void run(std::ostream &OS); + void run(raw_ostream &OS); - // runEnums - Print out enum values for all of the instructions. - void runEnums(std::ostream &OS); private: - void printDefList(const std::vector &Uses, unsigned Num, - std::ostream &OS) const; + typedef std::map, unsigned> OperandInfoMapTy; + void emitRecord(const CodeGenInstruction &Inst, unsigned Num, Record *InstrInfo, std::map, unsigned> &EL, - std::map, unsigned> &OpInfo, - std::ostream &OS); + std::map &BM, + const OperandInfoMapTy &OpInfo, + raw_ostream &OS); + + // Itinerary information. void GatherItinClasses(); - unsigned ItinClassNumber(std::string ItinName); - void emitShiftedValue(Record *R, StringInit *Val, IntInit *Shift, - std::ostream &OS); + unsigned getItinClassNumber(const Record *InstRec); + + // Operand information. + void EmitOperandInfo(raw_ostream &OS, OperandInfoMapTy &OperandInfoIDs); std::vector GetOperandInfo(const CodeGenInstruction &Inst); + + void DetectRegisterClassBarriers(std::vector &Defs, + const std::vector &RCs, + std::vector &Barriers); }; } // End llvm namespace