X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=CREDITS.TXT;h=ede4ee5b32690631cf1b2df3eed68a135c8e12d9;hb=3d6a30ea3b8272a46b1cd20684a09ea5e56c9548;hp=750a1c2e56f9744baa5d440979d2f887efa923a5;hpb=baf8c08693d2086cd8e45b31645812b51984b926;p=oota-llvm.git diff --git a/CREDITS.TXT b/CREDITS.TXT index 750a1c2e56f..ede4ee5b326 100644 --- a/CREDITS.TXT +++ b/CREDITS.TXT @@ -107,6 +107,10 @@ N: Rafael Avila de Espindola E: rafael.espindola@gmail.com D: The ARM backend +N: Dave Estes +E: cestes@codeaurora.org +D: AArch64 machine description for Cortex-A53 + N: Alkis Evlogimenos E: alkis@evlogimenos.com D: Linear scan register allocator, many codegen improvements, Java frontend @@ -132,6 +136,7 @@ W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/ D: PPC backend fixes for Linux N: Louis Gerbarg +E: lgg@apple.com D: Portions of the PowerPC backend N: Saem Ghani @@ -161,10 +166,12 @@ D: Improvements for space efficiency N: James Grosbach E: grosbach@apple.com +I: grosbach D: SjLj exception handling support D: General fixes and improvements for the ARM back-end D: MCJIT D: ARM integrated assembler and assembly parser +D: Led effort for the backend formerly known as ARM64 N: Lang Hames E: lhames@gmail.com @@ -338,6 +345,10 @@ D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements D: Optimizer improvements, Loop Index Split +N: Ana Pazos +E: apazos@codeaurora.org +D: Fixes and improvements to the AArch64 backend + N: Wesley Peck E: peckw@wesleypeck.com W: http://wesleypeck.com/ @@ -367,8 +378,10 @@ D: ARM calling conventions rewrite, hard float support N: Chad Rosier E: mcrosier@codeaurora.org -D: ARM fast-isel improvements -D: Performance monitoring +I: mcrosier +D: AArch64 fast instruction selection pass +D: Fixes and improvements to the ARM fast-isel pass +D: Fixes and improvements to the AArch64 backend N: Nadav Rotem E: nrotem@apple.com @@ -443,3 +456,4 @@ D: Bunches of stuff N: Bob Wilson E: bob.wilson@acm.org D: Advanced SIMD (NEON) support in the ARM backend. +