X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=arch%2Farm%2Fboot%2Fdts%2Frk3036-clocks.dtsi;h=b692f309d312b9f9d114fb5e63482fcc0a550dfb;hb=e3ff4b33fd1a3d1ce3d1cdc0de665758bad2371f;hp=6464739f08e52489c054b83d63afe8a0e0dad06b;hpb=4f26888822537555202793ca79b7d104b46194ef;p=firefly-linux-kernel-4.4.55.git diff --git a/arch/arm/boot/dts/rk3036-clocks.dtsi b/arch/arm/boot/dts/rk3036-clocks.dtsi old mode 100644 new mode 100755 index 6464739f08e5..b692f309d312 --- a/arch/arm/boot/dts/rk3036-clocks.dtsi +++ b/arch/arm/boot/dts/rk3036-clocks.dtsi @@ -42,7 +42,7 @@ rmii_clkin: rmii_clkin { compatible = "rockchip,rk-fixed-clock"; clock-output-names = "rmii_clkin"; - clock-frequency = <0>; + clock-frequency = <50000000>; #clock-cells = <0>; }; @@ -60,6 +60,13 @@ #clock-cells = <0>; }; + jtag_tck: jtag_tck { + compatible = "rockchip,rk-fixed-clock"; + clock-output-names = "jtag_tck"; + clock-frequency = <0>; + #clock-cells = <0>; + }; + dummy: dummy { compatible = "rockchip,rk-fixed-clock"; clock-output-names = "dummy"; @@ -78,7 +85,7 @@ fixed_factor_cons { compatible = "rockchip,rk-fixed-factor-cons"; - +/* otgphy0_12m: otgphy0_12m { compatible = "rockchip,rk-fixed-factor-clock"; clocks = <&clk_gates1 5>; @@ -87,6 +94,24 @@ clock-mult = <20>; #clock-cells = <0>; }; +*/ + hclk_vcodec: hclk_vcodec { + compatible = "rockchip,rk-fixed-factor-clock"; + clocks = <&aclk_vcodec_pre>; + clock-output-names = "hclk_vcodec"; + clock-div = <4>; + clock-mult = <1>; + #clock-cells = <0>; + }; + + io_mac_mdclkout: io_mac_mdclkout { + compatible = "rockchip,rk-fixed-factor-clock"; + clocks = <&aclk_peri_pre>; + clock-output-names = "io_mac_mdclkout"; + clock-div = <2>; + clock-mult = <1>; + #clock-cells = <0>; + }; }; clock_regs { @@ -121,7 +146,7 @@ status-reg = <0x0014 10>; clocks = <&xin24m>; clock-output-names = "clk_dpll"; - rockchip,pll-type = ; + rockchip,pll-type = ; #clock-cells = <0>; }; @@ -152,11 +177,11 @@ #address-cells = <1>; #size-cells = <1>; - clk_core_pre_div: clk_core_pre_div { + clk_core_div: clk_core_div { compatible = "rockchip,rk3188-div-con"; rockchip,bits = <0 5>; - clocks = <&clk_core_pre>; - clock-output-names = "clk_core_pre"; + clocks = <&clk_core>; + clock-output-names = "clk_core"; rockchip,div-type = ; #clock-cells = <0>; rockchip,clkops-idx = ; @@ -166,11 +191,11 @@ /* reg[6:5]: reserved */ - clk_core_pre: clk_core_pre_mux { + clk_core: clk_core_mux { compatible = "rockchip,rk3188-mux-con"; rockchip,bits = <7 1>; clocks = <&clk_apll>, <&clk_gates0 6>; - clock-output-names = "clk_core_pre"; + clock-output-names = "clk_core"; #clock-cells = <0>; #clock-init-cells = <1>; }; @@ -192,7 +217,7 @@ aclk_cpu_pre: aclk_cpu_pre_mux { compatible = "rockchip,rk3188-mux-con"; rockchip,bits = <14 2>; - clocks = <&clk_apll>, <&clk_gates10 8>,<&clk_gates0 1>; + clocks = <&clk_apll>, <&clk_dpll>,<&clk_gpll>; clock-output-names = "aclk_cpu_pre"; #clock-cells = <0>; #clock-init-cells = <1>; @@ -209,7 +234,7 @@ pclk_dbg_div: pclk_dbg_div { compatible = "rockchip,rk3188-div-con"; rockchip,bits = <0 4>; - clocks = <&clk_core_pre>; + clocks = <&clk_core>; clock-output-names = "pclk_dbg"; rockchip,div-type = ; #clock-cells = <0>; @@ -219,7 +244,7 @@ aclk_core_pre: aclk_core_pre_div { compatible = "rockchip,rk3188-div-con"; rockchip,bits = <4 3>; - clocks = <&clk_core_pre>; + clocks = <&clk_core>; clock-output-names = "aclk_core_pre"; rockchip,div-type = ; #clock-cells = <0>; @@ -608,6 +633,7 @@ clocks = <&clk_apll>,<&clk_dpll>, <&clk_gpll>, <&usb_480m>; clock-output-names = "clk_uart_pll"; #clock-cells = <0>; + #clock-init-cells = <1>; }; /* reg[15:12]: reserved */ @@ -792,6 +818,7 @@ clocks = <&clk_apll>, <&clk_dpll>, <&clk_gpll>; clock-output-names = "clk_hevc_core"; #clock-cells = <0>; + #clock-init-cells = <1>; }; clk_hevc_core_div: clk_hevc_core_div { @@ -803,6 +830,7 @@ #clock-cells = <0>; rockchip,clkops-idx = ; + rockchip,flags = ; }; /* reg[31:7]: reserved */ @@ -821,6 +849,7 @@ clocks = <&clk_apll>, <&clk_dpll>, <&clk_gpll>; clock-output-names = "clk_mac_pll"; #clock-cells = <0>; + #clock-init-cells = <1>; }; /* reg[2]: reserved */ @@ -837,24 +866,26 @@ #clock-init-cells = <1>; }; - clk_mac_pll_div: clk_mac_pll_div { + clk_mac_ref_div: clk_mac_ref_div { compatible = "rockchip,rk3188-div-con"; rockchip,bits = <4 5>; - clocks = <&clk_mac_pll>; - clock-output-names = "clk_mac_pll"; + clocks = <&clk_mac_ref>; + clock-output-names = "clk_mac"; rockchip,div-type = ; #clock-cells = <0>; - rockchip,clkops-idx = - ; + #clock-init-cells = <1>; }; - clk_mac_ref_div: clk_mac_ref_div { + clk_mac_pll_div: clk_mac_pll_div { compatible = "rockchip,rk3188-div-con"; rockchip,bits = <9 5>; - clocks = <&clk_mac_ref>; - clock-output-names = "clk_mac"; + clocks = <&clk_mac_pll>; + clock-output-names = "clk_mac_pll"; rockchip,div-type = ; #clock-cells = <0>; + rockchip,clkops-idx = + ; + #clock-init-cells = <1>; }; /* reg[15:14]: reserved */ @@ -918,7 +949,7 @@ clk_ddr: ddr_clk_pll_mux { compatible = "rockchip,rk3188-mux-con"; rockchip,bits = <8 1>; - clocks = <&clk_gates0 2>, <&clk_gates0 8>; + clocks = <&clk_dpll>, <&dummy>; clock-output-names = "clk_ddr"; #clock-cells = <0>; }; @@ -938,6 +969,7 @@ clocks = <&clk_apll>, <&clk_dpll>, <&clk_gpll>; clock-output-names = "dclk_lcdc1"; #clock-cells = <0>; + #clock-init-cells = <1>; }; /* reg[7:2]: reserved */ @@ -950,8 +982,8 @@ rockchip,div-type = ; #clock-cells = <0>; rockchip,clkops-idx = - ; - rockchip,flags = ; + ; + rockchip,flags = ; }; }; @@ -1056,6 +1088,7 @@ #clock-cells = <0>; rockchip,clkops-idx = ; + rockchip,flags = ; }; /* reg[13]: reserved */ @@ -1076,11 +1109,11 @@ #address-cells = <1>; #size-cells = <1>; - clk_gpu_pre_div: clk_gpu_pre_div { + clk_gpu_div: clk_gpu_div { compatible = "rockchip,rk3188-div-con"; rockchip,bits = <0 5>; - clocks = <&clk_gpu_pre>; - clock-output-names = "clk_gpu_pre"; + clocks = <&clk_gpu>; + clock-output-names = "clk_gpu"; rockchip,div-type = ; #clock-cells = <0>; rockchip,clkops-idx = @@ -1090,11 +1123,11 @@ /* reg[7:5]: reserved */ - clk_gpu_pre: clk_gpu_pre_mux { + clk_gpu: clk_gpu_mux { compatible = "rockchip,rk3188-mux-con"; rockchip,bits = <8 2>; - clocks = <&clk_apll>, <&clk_dpll>, <&clk_gpll>; - clock-output-names = "clk_gpu_pre"; + clocks = <&dummy>, <&dummy>, <&clk_gpll>; + clock-output-names = "clk_gpu"; #clock-cells = <0>; #clock-init-cells = <1>; }; @@ -1117,11 +1150,11 @@ compatible = "rockchip,rk3188-gate-clk"; reg = <0x00d0 0x4>; clocks = - <&clk_core_pre>, <&clk_gpll>, + <&clk_core>, <&clk_gpll>, <&clk_dpll>, <&aclk_cpu_pre>, <&aclk_cpu_pre>, <&aclk_cpu_pre>, - <&clk_gpll>, <&clk_core_pre>, + <&clk_gpll>, <&clk_core>, <&clk_gpll>, <&clk_i2s_pll>, <&i2s_frac>, <&hclk_vio_pre>, @@ -1130,7 +1163,7 @@ <&clk_i2s>, <&dummy>; clock-output-names = - "clk_core_pre", "reserved", /* do not use bit1 = "cpu_gpll" */ + "pclk_dbg", "reserved", /* do not use bit1 = "cpu_gpll" */ "reserved", "aclk_cpu_pre", "hclk_cpu_pre", "pclk_cpu_pre", @@ -1141,7 +1174,7 @@ "clk_cryto", "clk_i2s_out", "clk_i2s", "clk_testout"; - rockchip,suspend-clkgating-setting=<0x0 0x0>; + rockchip,suspend-clkgating-setting=<0x19ff 0x19ff>; #clock-cells = <1>; }; @@ -1151,7 +1184,7 @@ reg = <0x00d4 0x4>; clocks = <&clk_timer0>, <&clk_timer1>, - <&dummy>, <&dummy>, + <&dummy>, <&jtag_tck>, <&aclk_vio_pre>, <&xin12m>, <&dummy>, <&dummy>, @@ -1175,7 +1208,7 @@ "clk_uart2_div", "uart2_frac", "reserved", "reserved"; - rockchip,suspend-clkgating-setting=<0x0 0x0>; + rockchip,suspend-clkgating-setting=<0xc0af 0xc0af>; #clock-cells = <1>; }; @@ -1207,7 +1240,7 @@ "spdif_frac", "clk_sdio", "clk_emmc", "reserved"; - rockchip,suspend-clkgating-setting=<0x0 0x0>; + rockchip,suspend-clkgating-setting=<0x81bf 0x81bf>; #clock-cells = <1>; }; @@ -1219,28 +1252,28 @@ <&dummy>, <&dummy>, <&dclk_lcdc1>, <&dummy>, - <&dummy>, <&dummy>, + <&dummy>, <&hclk_peri_pre>, <&dummy>, <&dummy>, <&pclk_cpu_pre>, <&dummy>, <&dummy>, <&aclk_vcodec_pre>, - <&aclk_vcodec_pre>, <&clk_gpu_pre>, + <&aclk_vcodec_pre>, <&clk_gpu>, <&hclk_peri_pre>, <&dummy>; clock-output-names = "reserved", "reserved", "dclk_lcdc1", "reserved", - "reserved", "reserved", + "reserved", "g_hclk_mac", "reserved", "reserved", "g_pclk_hdmi", "reserved", "reserved", "aclk_vcodec_pre", - "hclk_vcodec", "clk_gpu_pre", + "hclk_vcodec", "clk_gpu", "g_hclk_sfc", "reserved"; - rockchip,suspend-clkgating-setting=<0x0000 0x0000>; + rockchip,suspend-clkgating-setting=<0xa7fb 0xa7fb>; #clock-cells = <1>; }; @@ -1265,7 +1298,7 @@ "g_hp_axi_matrix", "g_pp_axi_matrix", "g_aclk_cpu_peri", "g_ap_axi_matrix", - "reserved", "reserved", + "reserved", "g_hclk_mac", "reserved", "reserved", "reserved", "reserved", @@ -1275,7 +1308,7 @@ "g_aclk_intmem", "reserved", "reserved", "reserved"; - rockchip,suspend-clkgating-setting = <0x0000 0x0000>; + rockchip,suspend-clkgating-setting = <0xffff 0xffff>; #clock-cells = <1>; }; @@ -1308,7 +1341,7 @@ "reserved", "g_hclk_otg0", "g_pclk_acodec", "reserved"; - rockchip,suspend-clkgating-setting = <0x0000 0x0000>; + rockchip,suspend-clkgating-setting = <0x91fd 0x91fd>; #clock-cells = <1>; }; @@ -1342,7 +1375,7 @@ "g_hclk_vio_bus", "g_aclk_vio", "reserved", "reserved"; - rockchip,suspend-clkgating-setting = <0x0000 0x0000>; + rockchip,suspend-clkgating-setting = <0xffff 0xffff>; #clock-cells = <1>; }; @@ -1376,7 +1409,7 @@ "g_pclk_spi", "reserved", "reserved", "g_pclk_wdt"; - rockchip,suspend-clkgating-setting = <0x0000 0x0000>; + rockchip,suspend-clkgating-setting = <0x6ff2 0x6ff2>; #clock-cells = <1>; }; @@ -1410,7 +1443,7 @@ "reserved", "reserved", "reserved", "reserved"; - rockchip,suspend-clkgating-setting=<0x0000 0x0000>; + rockchip,suspend-clkgating-setting=<0xf38c 0xf38c>; #clock-cells = <1>; }; @@ -1441,9 +1474,9 @@ "reserved", "reserved", "reserved", "g_hclk_usb_peri", - "g_hclk_peri_arbi", "g_aclk_peri_niu"; + "g_hclk_pe_arbi", "g_aclk_peri_niu"; - rockchip,suspend-clkgating-setting=<0x0 0x0>; + rockchip,suspend-clkgating-setting=<0xdf9f 0xdf9f>; #clock-cells = <1>; }; @@ -1466,7 +1499,7 @@ clock-output-names = "g_clk_pvtm_core", "g_clk_pvtm_gpu", - "g_clk_pvtm_video", "reserved", + "g_pvtm_video", "reserved", "clk_nandc", "clk_sfc", "clk_hevc_core", "reserved", @@ -1477,7 +1510,7 @@ "reserved", "reserved", "reserved", "reserved"; - rockchip,suspend-clkgating-setting = <0x0 0x0>; /* pwm logic vol */ + rockchip,suspend-clkgating-setting = <0x0077 0x0077>; /* pwm logic vol */ #clock-cells = <1>; };