X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=docs%2FCommandGuide%2Flli.pod;h=e9fdf74fe53ea7e849c8741717df34da089ff7ba;hb=1a203571ca94c4770a8cada8ace7fbeb0e65799a;hp=879814067a731578076f6420b69ce724236b46d8;hpb=b7a54b9b72b443a7c497e15ed2fb563f73949cc7;p=oota-llvm.git diff --git a/docs/CommandGuide/lli.pod b/docs/CommandGuide/lli.pod index 879814067a7..e9fdf74fe53 100644 --- a/docs/CommandGuide/lli.pod +++ b/docs/CommandGuide/lli.pod @@ -22,14 +22,28 @@ program from standard input. The optional I specified on the command line are passed to the program as arguments. -=head1 OPTIONS +=head1 GENERAL OPTIONS =over +=item B<-fake-argv0>=I + +Override the C value passed into the executing program. + +=item B<-force-interpreter>=I<{false,true}> + +If set to true, use the interpreter even if a just-in-time compiler is available +for this architecture. Defaults to false. + =item B<-help> Print a summary of command line options. +=item B<-load>=I + +Causes B to load the plugin (shared object) named I and use +it for optimization. + =item B<-stats> Print statistics from the code-generation passes. This is only meaningful for @@ -40,6 +54,16 @@ the just-in-time compiler, at present. Record the amount of time needed for each code-generation pass and print it to standard error. +=item B<-version> + +Print out the version of B and exit without doing anything else. + +=back + +=head1 TARGET OPTIONS + +=over + =item B<-mtriple>=I Override the target triple specified in the input bitcode file with the @@ -67,33 +91,112 @@ operations are enabled or not. The default set of attributes is set by the current CPU. For a list of available attributes, use: B /dev/null | llc -march=xyz -mattr=help> -=item B<-fake-argv0>=I +=back -Override the C value passed into the executing program. -=item B<-force-interpreter>=I<{false,true}> +=head1 FLOATING POINT OPTIONS -If set to true, use the interpreter even if a just-in-time compiler is available -for this architecture. Defaults to false. +=over -=item B<-load>=I +=item B<-disable-excess-fp-precision> -Causes B to load the plugin (shared object) named I and use -it for optimization. +Disable optimizations that may increase floating point precision. -=item B<-soft-float> +=item B<-enable-finite-only-fp-math> -Causes B to generate software floating point library calls instead of -equivalent hardware instructions. +Enable optimizations that assumes only finite floating point math. That is, +there is no NAN or Inf values. =item B<-enable-unsafe-fp-math> Causes B to enable optimizations that may decrease floating point precision. -=item B<-disable-excess-fp-precision> +=item B<-soft-float> -Disable optimizations that may increase floating point precision. +Causes B to generate software floating point library calls instead of +equivalent hardware instructions. + +=back + +=head1 CODE GENERATION OPTIONS + +=over + +=item B<-code-model>=I + +Choose the code model from: + + default: Target default code model + small: Small code model + kernel: Kernel code model + medium: Medium code model + large: Large code model + +=item B<-disable-post-RA-scheduler> + +Disable scheduling after register allocation. + +=item B<-disable-spill-fusing> + +Disable fusing of spill code into instructions. + +=item B<-enable-correct-eh-support> + +Make the -lowerinvoke pass insert expensive, but correct, EH code. + +=item B<-enable-eh> + +Exception handling should be emitted. + +=item B<-join-liveintervals> + +Coalesce copies (default=true). + +=item B<-nozero-initialized-in-bss> +Don't place zero-initialized symbols into the BSS section. + +=item B<-pre-RA-sched>=I + +Instruction schedulers available (before register allocation): + + =default: Best scheduler for the target + =none: No scheduling: breadth first sequencing + =simple: Simple two pass scheduling: minimize critical path and maximize processor utilization + =simple-noitin: Simple two pass scheduling: Same as simple except using generic latency + =list-burr: Bottom-up register reduction list scheduling + =list-tdrr: Top-down register reduction list scheduling + =list-td: Top-down list scheduler -print-machineinstrs - Print generated machine code + +=item B<-regalloc>=I + +Register allocator to use: (default = linearscan) + + =bigblock: Big-block register allocator + =linearscan: linear scan register allocator =local - local register allocator + =simple: simple register allocator + +=item B<-relocation-model>=I + +Choose relocation model from: + + =default: Target default relocation model + =static: Non-relocatable code =pic - Fully relocatable, position independent code + =dynamic-no-pic: Relocatable external references, non-relocatable code + +=item B<-spiller> + +Spiller to use: (default: local) + + =simple: simple spiller + =local: local spiller + +=item B<-x86-asm-syntax>=I + +Choose style of code to emit from X86 backend: + + =att: Emit AT&T-style assembly + =intel: Emit Intel-style assembly =back