X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=docs%2FLangRef.html;h=25ac4cbde1b6be025f5884d5519f5faeeb5a3ac2;hb=e7de7e3574245fe4cdee3ea895c3aeabca04db63;hp=c5c04cd1aaab12dd6765e944d427eb3642f365ce;hpb=4ef2b76cd1762034d2261fad19de6156282de6be;p=oota-llvm.git diff --git a/docs/LangRef.html b/docs/LangRef.html index c5c04cd1aaa..25ac4cbde1b 100644 --- a/docs/LangRef.html +++ b/docs/LangRef.html @@ -26,19 +26,25 @@
This document is a reference manual for the LLVM assembly language. -LLVM is an SSA based representation that provides type safety, -low-level operations, flexibility, and the capability of representing -'all' high-level languages cleanly. It is the common code +LLVM is a Static Single Assignment (SSA) based representation that provides +type safety, low-level operations, flexibility, and the capability of +representing 'all' high-level languages cleanly. It is the common code representation used throughout all phases of the LLVM compilation strategy.
The next two types of linkage are targeted for Microsoft Windows platform only. They are designed to support importing (exporting) symbols from (to) - DLLs. + DLLs (Dynamic Link Libraries).
A global variable may be declared to reside in a target-specifc numbered +address space. For targets that support them, address spaces may affect how +optimizations are performed and/or what target instructions are used to access +the variable. The default address space is zero. The address space qualifier +must precede any other attributes.
+LLVM allows an explicit section to be specified for globals. If the target supports it, it will emit globals to the section specified.
@@ -673,12 +725,12 @@ to whatever it feels convenient. If an explicit alignment is specified, the global is forced to have at least that much alignment. All alignments must be a power of 2. -For example, the following defines a global with an initializer, section, - and alignment:
+For example, the following defines a global in a numbered address space with +an initializer, section, and alignment:
-@G = constant float 1.0, section "foo", align 4 +@G = constant float 1.0 addrspace(5), section "foo", align 4
A function definition contains a list of basic blocks, forming the CFG for +
A function definition contains a list of basic blocks, forming the CFG +(Control Flow Graph) for the function. Each basic block may optionally start with a label (giving the basic block a symbol table entry), contains a list of instructions, and ends with a terminator instruction (such as a branch or @@ -739,15 +794,15 @@ a power of 2.
Aliases act as "second name" for the aliasee value (which can be either - function or global variable or bitcast of global value). Aliases may have an - optional linkage type, and an + function, global variable, another alias or bitcast of global value). Aliases + may have an optional linkage type, and an optional visibility style.
-@<Name> = [Linkage] [Visibility] alias <AliaseeTy> @<Aliasee> +@<Name> = alias [Linkage] [Visibility] <AliaseeTy> @<Aliasee>
The return type and each parameter of a function type may have a set of parameter attributes associated with them. Parameter attributes are used to communicate additional information about the result or parameters of - a function. Parameter attributes are considered to be part of the function - type so two functions types that differ only by the parameter attributes - are different function types.
+ a function. Parameter attributes are considered to be part of the function, + not of the function type, so functions with different parameter attributes + can have the same function type.Parameter attributes are simple keywords that follow the type specified. If multiple parameter attributes are needed, they are space separated. For @@ -771,49 +826,128 @@ a power of 2.
-%someFunc = i16 (i8 signext %someParam) zeroext -%someFunc = i16 (i8 zeroext %someParam) zeroext +declare i32 @printf(i8* noalias , ...) nounwind +declare i32 @atoi(i8*) nounwind readonly
Note that the two function types above are unique because the parameter has - a different attribute (signext in the first one, zeroext in - the second). Also note that the attribute for the function result - (zeroext) comes immediately after the argument list.
+Note that any attributes for the function result (nounwind, + readonly) come immediately after the argument list.
Currently, only the following parameter attributes are defined:
Each function may specify a garbage collector name, which is simply a +string.
+ +define void @f() gc "name" { ...
The compiler declares the supported values of name. Specifying a +collector which will cause the compiler to alter its output in order to support +the named garbage collection algorithm.
+The function definition may list function notes which are used by +various passes.
+ ++define void @f() notes(inline=Always) { ... } +define void @f() notes(inline=Always,opt-size) { ... } +define void @f() notes(inline=Never,opt-size) { ... } +define void @f() notes(opt-size) { ... } ++
Any notes that are not documented here are considered invalid notes.
+When llvm is determining the alignment for a given type, it uses the +
When LLVM is determining the alignment for a given type, it uses the following rules:
The LLVM type system is one of the most important features of the intermediate representation. Being typed enables a number of -optimizations to be performed on the IR directly, without having to do +optimizations to be performed on the intermediate representation directly, +without having to do extra analyses on the side before the transformation. A strong type system makes it easier to read the generated code and enables novel analyses and transformations that are not feasible to perform on normal @@ -938,69 +1073,114 @@ three address code representations.
The primitive types are the fundamental building blocks of the LLVM -system. The current set of primitive types is as follows:
- -
-
|
-
-
|
-
These different primitive types fall into a few useful +
The types fall into a few useful classifications:
Classification | Types | ||
---|---|---|---|
integer | +integer | i1, i2, i3, ... i8, ... i16, ... i32, ... i64, ... | |
floating point | -float, double | +floating point | +float, double, x86_fp80, fp128, ppc_fp128 |
first class | -i1, ..., float, double, - pointer,vector + | integer, + floating point, + pointer, + vector, + structure, + array, + label. | |
primitive | +label, + void, + floating point. | +||
derived | +integer, + array, + function, + pointer, + structure, + packed structure, + vector, + opaque. + |
The first class types are perhaps the most important. Values of these types are the only ones which can be produced by instructions, passed as arguments, or used as operands to -instructions. This means that all structures and arrays must be -manipulated either by pointer or by component.
+instructions. +The primitive types are the fundamental building blocks of the LLVM +system.
+ +Type | Description |
---|---|
float | 32-bit floating point value |
double | 64-bit floating point value |
fp128 | 128-bit floating point value (112-bit mantissa) |
x86_fp80 | 80-bit floating point value (X87) |
ppc_fp128 | 128-bit floating point value (two 64-bits) |
The void type does not represent any value and has no size.
+ ++ void ++
The label type represents code labels.
+ ++ label +
- i1 - i4 - i8 - i16 - i32 - i42 - i64 - i1942652 - |
-
- A boolean integer of 1 bit - A nibble sized integer of 4 bits. - A byte sized integer of 8 bits. - A half word sized integer of 16 bits. - A word sized integer of 32 bits. - An integer whose bit width is the answer. - A double word sized integer of 64 bits. - A really big integer of over 1 million bits. - |
+
i1 | +a single-bit integer. | +
i32 | +a 32-bit integer. | +
i1942652 | +a really big integer of over 1 million bits. |
- [40 x i32 ] - [41 x i32 ] - [40 x i8] - |
-
- Array of 40 32-bit integer values. - Array of 41 32-bit integer values. - Array of 40 8-bit integer values. - |
+ [40 x i32] | +Array of 40 32-bit integer values. | +
[41 x i32] | +Array of 41 32-bit integer values. | +||
[4 x i8] | +Array of 4 8-bit integer values. |
Here are some examples of multidimensional arrays:
- [3 x [4 x i32]] - [12 x [10 x float]] - [2 x [3 x [4 x i16]]] - |
-
- 3x4 array of 32-bit integer values. - 12x10 array of single precision floating point values. - 2x3x4 array of 16-bit integer values. - |
+ [3 x [4 x i32]] | +3x4 array of 32-bit integer values. | +
[12 x [10 x float]] | +12x10 array of single precision floating point values. | +||
[2 x [3 x [4 x i16]]] | +2x3x4 array of 16-bit integer values. |
The function type can be thought of as a function signature. It -consists of a return type and a list of formal parameter types. -Function types are usually used to build virtual function tables -(which are structures of pointers to functions), for indirect function -calls, and when defining a function.
--The return type of a function type cannot be an aggregate type. -
+consists of a return type and a list of formal parameter types. The +return type of a function type is a scalar type, a void type, or a struct type. +If the return type is a struct type then all struct elements must be of first +class types, and the struct must have at least one element. +<returntype> (<parameter list>)+ +
+ <returntype list> (<parameter list>) ++
...where '<parameter list>' is a comma-separated list of type specifiers. Optionally, the parameter list may include a type ..., which indicates that the function takes a variable number of arguments. Variable argument functions can access their arguments with the variable argument handling intrinsic functions.
+ href="#int_varargs">variable argument handling intrinsic functions. +'<returntype list>' is a comma-separated list of +first class type specifiers. +{i32, i32} (i32) | +A function taking an i32>, returning two + i32 values as an aggregate of type { i32, i32 } + |
As in many languages, the pointer type represents a pointer or -reference to another object, which must live in memory.
+reference to another object, which must live in memory. Pointer types may have +an optional address space attribute defining the target-specific numbered +address space where the pointed-to object resides. The default address space is +zero.<type> *
- [4x i32]* - i32 (i32 *) * - |
-
- A pointer to array of
- four i32 values - A pointer to a [4x i32]* |
+ A pointer to array of four i32 values. | +
i32 (i32 *) * | + A pointer to a function that takes an i32*, returning an
- i32. - |
+ i32.
+ |
i32 addrspace(5)* | +A pointer to an i32 value + that resides in address space #5. |
- <4 x i32> - <8 x float> - <2 x i64> - |
-
- Vector of 4 32-bit integer values. - Vector of 8 floating-point values. - Vector of 2 64-bit integer values. - |
+ <4 x i32> | +Vector of 4 32-bit integer values. | +
<8 x float> | +Vector of 8 32-bit floating-point values. | +||
<2 x i64> | +Vector of 2 64-bit integer values. |
Opaque types are used to represent unknown types in the system. This -corresponds (for example) to the C notion of a foward declared structure type. +corresponds (for example) to the C notion of a forward declared structure type. In LLVM, opaque types can eventually be resolved to any type (not just a structure type).
@@ -1310,12 +1499,8 @@ structure type).- opaque - | -
- An opaque type. - |
+ opaque | +An opaque type. |
ret <type> <value> ; Return a value from a non-void function ret void ; Return from void function + ret <type> <value>, <type> <value> ; Return two values from a non-void function+
The 'ret' instruction is used to return control flow (and a value) from a function back to the caller.
There are two forms of the 'ret' instruction: one that -returns a value and then causes control flow, and one that just causes +returns value(s) and then causes control flow, and one that just causes control flow to occur.
+The 'ret' instruction may return any 'first class' type. Notice that a function is -not well formed if there exists a 'ret' -instruction inside of the function that returns a value that does not -match the return type of the function.
+ +The 'ret' instruction may return zero, one or multiple values. +The type of each return value must be a 'first +class' type. Note that a function is not well +formed if there exists a 'ret' instruction inside of the +function that returns values that do not match the return type of the +function.
+When the 'ret' instruction is executed, control flow returns back to the calling function's context. If the caller is a "call" instruction, execution continues at @@ -1701,10 +1911,16 @@ the instruction after the call. If the caller was an "invoke" instruction, execution continues at the beginning of the "normal" destination block. If the instruction returns a value, that value shall set the call or invoke instruction's -return value.
+return value. If the instruction returns multiple values then these +values can only be accessed through a 'getresult +' instruction. +ret i32 5 ; Return an integer value of 5 + ++ ret i32 5 ; Return an integer value of 5 ret void ; Return from a void function + ret i32 4, i8 2 ; Return two values 4 and 2@@ -1801,7 +2017,7 @@ branches or with a lookup table.Syntax:
- <result> = invoke [cconv] <ptr to function ty> %<function ptr val>(<function args>) + <result> = invoke [cconv] <ptr to function ty> <function ptr val>(<function args>) to label <normal label> unwind label <exception label>@@ -1814,7 +2030,9 @@ function, with the possibility of control flow transfer to either the "ret" instruction, control flow will return to the "normal" label. If the callee (or any indirect callees) returns with the "unwind" instruction, control is interrupted and -continued at the dynamically nearest "exception" label. +continued at the dynamically nearest "exception" label. If the callee function +returns multiple values then individual return values are only accessible through +a 'getresult' instruction.Arguments:
@@ -1862,9 +2080,9 @@ exception. Additionally, this is important for implementation ofExample:
- %retval = invoke i32 %Test(i32 15) to label %Continue + %retval = invoke i32 @Test(i32 15) to label %Continue unwind label %TestCleanup ; {i32}:retval set - %retval = invoke coldcc i32 %Test(i32 15) to label %Continue + %retval = invoke coldcc i32 %Testfnptr(i32 15) to label %Continue unwind label %TestCleanup ; {i32}:retval set@@ -1891,7 +2109,7 @@ primarily used to implement exception handling.Semantics:
-The 'unwind' intrinsic causes execution of the current function to +
The 'unwind' instruction causes execution of the current function to immediately halt. The dynamic call stack is then searched for the first invoke instruction on the call stack. Once found, execution continues at the "exceptional" destination block specified by the @@ -1929,106 +2147,165 @@ no-return function cannot be reached, and other facts.
- + +Binary operators are used to do most of the computation in a -program. They require two operands, execute an operation on them, and +program. They require two operands of the same type, execute an operation on them, and produce a single value. The operands might represent multiple data, as is the case with the vector data type. -The result value of a binary operator is not -necessarily the same type as its operands.
+The result value has the same type as its operands.There are several different binary operators:
+- + +Syntax:
-<result> = add <ty> <var1>, <var2> ; yields {ty}:result + ++ <result> = add <ty> <op1>, <op2> ; yields {ty}:result+Overview:
+The 'add' instruction returns the sum of its two operands.
+Arguments:
-The two arguments to the 'add' instruction must be either integer or floating point values. - This instruction can also take vector versions of the values. -Both arguments must have identical types.
+ +The two arguments to the 'add' instruction must be integer, floating point, or + vector values. Both arguments must have identical + types.
+Semantics:
+The value produced is the integer or floating point sum of the two operands.
+ +If an integer sum has unsigned overflow, the result returned is the +mathematical result modulo 2n, where n is the bit width of +the result.
+ +Because LLVM integers use a two's complement representation, this +instruction is appropriate for both signed and unsigned integers.
+Example:
-<result> = add i32 4, %var ; yields {i32}:result = 4 + %var + ++ <result> = add i32 4, %var ; yields {i32}:result = 4 + %var++ - + +Syntax:
-<result> = sub <ty> <var1>, <var2> ; yields {ty}:result + ++ <result> = sub <ty> <op1>, <op2> ; yields {ty}:result+Overview:
+The 'sub' instruction returns the difference of its two operands.
-Note that the 'sub' instruction is used to represent the 'neg' -instruction present in most other intermediate representations.
+ +Note that the 'sub' instruction is used to represent the +'neg' instruction present in most other intermediate +representations.
+Arguments:
-The two arguments to the 'sub' instruction must be either integer or floating point -values. -This instruction can also take vector versions of the values. -Both arguments must have identical types.
+ +The two arguments to the 'sub' instruction must be integer, floating point, + or vector values. Both arguments must have identical + types.
+Semantics:
+The value produced is the integer or floating point difference of the two operands.
+ +If an integer difference has unsigned overflow, the result returned is the +mathematical result modulo 2n, where n is the bit width of +the result.
+ +Because LLVM integers use a two's complement representation, this +instruction is appropriate for both signed and unsigned integers.
+Example:
<result> = sub i32 4, %var ; yields {i32}:result = 4 - %var <result> = sub i32 0, %val ; yields {i32}:result = -%var++Syntax:
-<result> = mul <ty> <var1>, <var2> ; yields {ty}:result +<result> = mul <ty> <op1>, <op2> ; yields {ty}:resultOverview:
The 'mul' instruction returns the product of its two operands.
+Arguments:
-The two arguments to the 'mul' instruction must be either integer or floating point -values. -This instruction can also take vector versions of the values. -Both arguments must have identical types.
+ +The two arguments to the 'mul' instruction must be integer, floating point, +or vector values. Both arguments must have identical +types.
+Semantics:
+The value produced is the integer or floating point product of the two operands.
-Because the operands are the same width, the result of an integer -multiplication is the same whether the operands should be deemed unsigned or -signed.
+ +If the result of an integer multiplication has unsigned overflow, +the result returned is the mathematical result modulo +2n, where n is the bit width of the result.
+Because LLVM integers use a two's complement representation, and the +result is the same width as the operands, this instruction returns the +correct result for both signed and unsigned integers. If a full product +(e.g. i32xi32->i64) is needed, the operands +should be sign-extended or zero-extended as appropriate to the +width of the full product.
Example:
<result> = mul i32 4, %var ; yields {i32}:result = 4 * %varSyntax:
-<result> = udiv <ty> <var1>, <var2> ; yields {ty}:result +<result> = udiv <ty> <op1>, <op2> ; yields {ty}:resultOverview:
The 'udiv' instruction returns the quotient of its two operands.
+Arguments:
+The two arguments to the 'udiv' instruction must be -integer values. Both arguments must have identical -types. This instruction can also take vector versions -of the values in which case the elements must be integers.
+integer or vector of integer +values. Both arguments must have identical types. +Semantics:
-The value produced is the unsigned integer quotient of the two operands. This -instruction always performs an unsigned division operation, regardless of -whether the arguments are unsigned or not.
+ +The value produced is the unsigned integer quotient of the two operands.
+Note that unsigned integer division and signed integer division are distinct +operations; for signed integer division, use 'sdiv'.
+Division by zero leads to undefined behavior.
Example:
<result> = udiv i32 4, %var ; yields {i32}:result = 4 / %var@@ -2038,20 +2315,28 @@ whether the arguments are unsigned or not.Syntax:
-<result> = sdiv <ty> <var1>, <var2> ; yields {ty}:result ++ <result> = sdiv <ty> <op1>, <op2> ; yields {ty}:result+Overview:
+The 'sdiv' instruction returns the quotient of its two operands.
+Arguments:
-The two arguments to the 'sdiv' instruction must be -integer values. Both arguments must have identical -types. This instruction can also take vector versions -of the values in which case the elements must be integers.
+ +The two arguments to the 'sdiv' instruction must be +integer or vector of integer +values. Both arguments must have identical types.
+Semantics:
-The value produced is the signed integer quotient of the two operands. This -instruction always performs a signed division operation, regardless of whether -the arguments are signed or not.
+The value produced is the signed integer quotient of the two operands rounded towards zero.
+Note that signed integer division and unsigned integer division are distinct +operations; for unsigned integer division, use 'udiv'.
+Division by zero leads to undefined behavior. Overflow also leads to +undefined behavior; this is a rare case, but can occur, for example, +by doing a 32-bit division of -2147483648 by -1.
Example:
<result> = sdiv i32 4, %var ; yields {i32}:result = 4 / %var@@ -2061,91 +2346,131 @@ the arguments are signed or not. Instruction+Syntax:
-<result> = fdiv <ty> <var1>, <var2> ; yields {ty}:result ++ <result> = fdiv <ty> <op1>, <op2> ; yields {ty}:resultOverview:
+The 'fdiv' instruction returns the quotient of its two operands.
+Arguments:
+The two arguments to the 'fdiv' instruction must be -floating point values. Both arguments must have -identical types. This instruction can also take vector -versions of floating point values.
+floating point or vector +of floating point values. Both arguments must have identical types. +Semantics:
+The value produced is the floating point quotient of the two operands.
+Example:
-<result> = fdiv float 4.0, %var ; yields {float}:result = 4.0 / %var + ++ <result> = fdiv float 4.0, %var ; yields {float}:result = 4.0 / %var- + +Syntax:
-<result> = urem <ty> <var1>, <var2> ; yields {ty}:result +<result> = urem <ty> <op1>, <op2> ; yields {ty}:resultOverview:
The 'urem' instruction returns the remainder from the unsigned division of its two arguments.
Arguments:
-The two arguments to the 'urem' instruction must be -integer values. Both arguments must have identical -types.
+The two arguments to the 'urem' instruction must be +integer or vector of integer +values. Both arguments must have identical types.
Semantics:
This instruction returns the unsigned integer remainder of a division. -This instruction always performs an unsigned division to get the remainder, -regardless of whether the arguments are unsigned or not.
+This instruction always performs an unsigned division to get the remainder. +Note that unsigned integer remainder and signed integer remainder are +distinct operations; for signed integer remainder, use 'srem'.
+Taking the remainder of a division by zero leads to undefined behavior.
Example:
<result> = urem i32 4, %var ; yields {i32}:result = 4 % %var+- + +Syntax:
-<result> = srem <ty> <var1>, <var2> ; yields {ty}:result + ++ <result> = srem <ty> <op1>, <op2> ; yields {ty}:result+Overview:
+The 'srem' instruction returns the remainder from the -signed division of its two operands.
+signed division of its two operands. This instruction can also take +vector versions of the values in which case +the elements must be integers. +Arguments:
+The two arguments to the 'srem' instruction must be -integer values. Both arguments must have identical -types.
+integer or vector of integer +values. Both arguments must have identical types. +Semantics:
+This instruction returns the remainder of a division (where the result -has the same sign as the dividend, var1), not the modulo -operator (where the result has the same sign as the divisor, var2) of +has the same sign as the dividend, op1), not the modulo +operator (where the result has the same sign as the divisor, op2) of a value. For more information about the difference, see The Math Forum. For a table of how this is implemented in various languages, please see Wikipedia: modulo operation.
+Note that signed integer remainder and unsigned integer remainder are +distinct operations; for unsigned integer remainder, use 'urem'.
+Taking the remainder of a division by zero leads to undefined behavior. +Overflow also leads to undefined behavior; this is a rare case, but can occur, +for example, by taking the remainder of a 32-bit division of -2147483648 by -1. +(The remainder doesn't actually overflow, but this rule lets srem be +implemented using instructions that return both the result of the division +and the remainder.)
Example:
<result> = srem i32 4, %var ; yields {i32}:result = 4 % %var+@@ -2156,9 +2481,8 @@ OperationsSyntax:
-<result> = frem <ty> <var1>, <var2> ; yields {ty}:result +<result> = frem <ty> <op1>, <op2> ; yields {ty}:resultOverview:
The 'frem' instruction returns the remainder from the division of its two operands.
Arguments:
The two arguments to the 'frem' instruction must be -floating point values. Both arguments must have -identical types.
+floating point or vector +of floating point values. Both arguments must have identical types. +Semantics:
-This instruction returns the remainder of a division.
+ +This instruction returns the remainder of a division. +The remainder has the same sign as the dividend.
+Example:
-<result> = frem float 4.0, %var ; yields {float}:result = 4.0 % %var + ++ <result> = frem float 4.0, %var ; yields {float}:result = 4.0 % %varBitwise binary operators are used to do various forms of bit-twiddling in a program. They are generally very efficient instructions and can commonly be strength reduced from other -instructions. They require two operands, execute an operation on them, -and produce a single value. The resulting value of the bitwise binary -operators is always the same type as its first operand.
+instructions. They require two operands of the same type, execute an operation on them, +and produce a single value. The resulting value is the same type as its operands. @@ -2166,20 +2490,31 @@ operators is always the same type as its first operand. Instruction@@ -2187,7 +2522,7 @@ the left a specified number of bits. InstructionSyntax:
-<result> = shl <ty> <var1>, <var2> ; yields {ty}:result +<result> = shl <ty> <op1>, <op2> ; yields {ty}:result+Overview:
+The 'shl' instruction returns the first operand shifted to the left a specified number of bits.
+Arguments:
+Both arguments to the 'shl' instruction must be the same integer type.
+ href="#t_integer">integer or vector of integer +type. 'op2' is treated as an unsigned value. +Semantics:
-The value produced is var1 * 2var2.
+ +The value produced is op1 * 2op2 mod 2n, +where n is the width of the result. If op2 is (statically or dynamically) negative or +equal to or larger than the number of bits in op1, the result is undefined.
+Example:
<result> = shl i32 4, %var ; yields {i32}: 4 << %var <result> = shl i32 4, 2 ; yields {i32}: 16 <result> = shl i32 1, 10 ; yields {i32}: 1024 + <result> = shl i32 1, 32 ; undefined@@ -2218,7 +2557,7 @@ InstructionSyntax:
-<result> = lshr <ty> <var1>, <var2> ; yields {ty}:result +<result> = lshr <ty> <op1>, <op2> ; yields {ty}:resultOverview:
@@ -2196,12 +2531,15 @@ operand shifted to the right a specified number of bits with zero fill.Arguments:
Both arguments to the 'lshr' instruction must be the same -integer type.
+integer or vector of integer +type. 'op2' is treated as an unsigned value.Semantics:
+This instruction always performs a logical shift right operation. The most significant bits of the result will be filled with zero bits after the -shift.
+shift. If op2 is (statically or dynamically) equal to or larger than +the number of bits in op1, the result is undefined.Example:
@@ -2209,6 +2547,7 @@ shift. <result> = lshr i32 4, 2 ; yields {i32}:result = 1 <result> = lshr i8 4, 3 ; yields {i8}:result = 0 <result> = lshr i8 -2, 1 ; yields {i8}:result = 0x7FFFFFFF + <result> = lshr i32 1, 32 ; undefined+Syntax:
-<result> = ashr <ty> <var1>, <var2> ; yields {ty}:result +<result> = ashr <ty> <op1>, <op2> ; yields {ty}:resultOverview:
@@ -2227,12 +2566,15 @@ operand shifted to the right a specified number of bits with sign extension.Arguments:
Both arguments to the 'ashr' instruction must be the same -integer type.
+integer or vector of integer +type. 'op2' is treated as an unsigned value.Semantics:
This instruction always performs an arithmetic shift right operation, The most significant bits of the result will be filled with the sign bit -of var1.
+of op1. If op2 is (statically or dynamically) equal to or +larger than the number of bits in op1, the result is undefined. +Example:
@@ -2240,27 +2582,37 @@ of var1. <result> = ashr i32 4, 2 ; yields {i32}:result = 1 <result> = ashr i8 4, 3 ; yields {i8}:result = 0 <result> = ashr i8 -2, 1 ; yields {i8}:result = -1 + <result> = ashr i32 1, 32 ; undefined+Syntax:
-<result> = and <ty> <var1>, <var2> ; yields {ty}:result + ++ <result> = and <ty> <op1>, <op2> ; yields {ty}:result+Overview:
+The 'and' instruction returns the bitwise logical and of its two operands.
+Arguments:
-The two arguments to the 'and' instruction must be integer values. Both arguments must have -identical types.
+ +The two arguments to the 'and' instruction must be +integer or vector of integer +values. Both arguments must have identical types.
+Semantics:
The truth table used for the 'and' instruction is:
-
+
@@ -2292,7 +2644,8 @@ identical types. Example:
-<result> = and i32 4, %var ; yields {i32}:result = 4 & %var ++ <result> = and i32 4, %var ; yields {i32}:result = 4 & %var <result> = and i32 15, 40 ; yields {i32}:result = 8 <result> = and i32 4, 8 ; yields {i32}:result = 0@@ -2301,19 +2654,20 @@ identical types.Syntax:
-<result> = or <ty> <var1>, <var2> ; yields {ty}:result +<result> = or <ty> <op1>, <op2> ; yields {ty}:resultOverview:
The 'or' instruction returns the bitwise logical inclusive or of its two operands.
Arguments:
-The two arguments to the 'or' instruction must be integer values. Both arguments must have -identical types.
+ +The two arguments to the 'or' instruction must be +integer or vector of integer +values. Both arguments must have identical types.
Semantics:
The truth table used for the 'or' instruction is:
-
+
@@ -2355,20 +2709,22 @@ identical types. Instruction Syntax:
-<result> = xor <ty> <var1>, <var2> ; yields {ty}:result +<result> = xor <ty> <op1>, <op2> ; yields {ty}:resultOverview:
The 'xor' instruction returns the bitwise logical exclusive or of its two operands. The xor is used to implement the "one's complement" operation, which is the "~" operator in C.
Arguments:
-The two arguments to the 'xor' instruction must be integer values. Both arguments must have -identical types.
+The two arguments to the 'xor' instruction must be +integer or vector of integer +values. Both arguments must have identical types.
+Semantics:
+The truth table used for the 'xor' instruction is:
-
+
@@ -2480,7 +2836,7 @@ results are undefined. Syntax:
- <result> = insertelement <n x <ty>> <val>, <ty> <elt>, i32 <idx> ; yields <n x <ty>> + <result> = insertelement <n x <ty>> <val>, <ty> <elt>, i32 <idx> ; yields <n x <ty>>Overview:
@@ -2571,6 +2927,114 @@ operand may be undef if performing a shuffle from only one vector. + + + ++ ++ + + + +LLVM supports several instructions for working with aggregate values. +
+ ++ ++ + + + + +Syntax:
+ ++ <result> = extractvalue <aggregate type> <val>, <idx>{, <idx>}* ++ +Overview:
+ ++The 'extractvalue' instruction extracts the value of a struct field +or array element from an aggregate value. +
+ + +Arguments:
+ ++The first operand of an 'extractvalue' instruction is a +value of struct or array +type. The operands are constant indices to specify which value to extract +in a similar manner as indices in a +'getelementptr' instruction. +
+ +Semantics:
+ ++The result is the value at the position in the aggregate specified by +the index operands. +
+ +Example:
+ ++ %result = extractvalue {i32, float} %agg, 0 ; yields i32 +++ ++ +Syntax:
+ ++ <result> = insertvalue <aggregate type> <val>, <ty> <val>, <idx> ; yields <n x <ty>> ++ +Overview:
+ ++The 'insertvalue' instruction inserts a value +into a struct field or array element in an aggregate. +
+ + +Arguments:
+ ++The first operand of an 'insertvalue' instruction is a +value of struct or array type. +The second operand is a first-class value to insert. +The following operands are constant indices +indicating the position at which to insert the value in a similar manner as +indices in a +'getelementptr' instruction. +The value to insert must have the same type as the value identified +by the indices. + +
Semantics:
+ ++The result is an aggregate of the same type as val. Its +value is that of val except that the value at the position +specified by the indices is that of elt. +
+ +Example:
+ ++ %result = insertvalue {i32, float} %agg, i32 1, 0 ; yields {i32, float} ++Memory Access and Addressing Operations @@ -2601,7 +3065,8 @@ allocate, and free memory in LLVM.Overview:
The 'malloc' instruction allocates memory from the system -heap and returns a pointer to it.
+heap and returns a pointer to it. The object is always allocated in the generic +address space (address space zero).Arguments:
@@ -2609,17 +3074,18 @@ heap and returns a pointer to it. sizeof(<type>)*NumElements bytes of memory from the operating system and returns a pointer of the appropriate type to the program. If "NumElements" is specified, it is the -number of elements allocated. If an alignment is specified, the value result -of the allocation is guaranteed to be aligned to at least that boundary. If -not specified, or if zero, the target can choose to align the allocation on any -convenient boundary. +number of elements allocated, otherwise "NumElements" is defaulted to be one. +If a constant alignment is specified, the value result of the allocation is guaranteed to +be aligned to at least that boundary. If not specified, or if zero, the target can +choose to align the allocation on any convenient boundary.'type' must be a sized type.
Semantics:
Memory is allocated using the system "malloc" function, and -a pointer is returned.
+a pointer is returned. The result of a zero byte allocattion is undefined. The +result is null if there is insufficient memory available.Example:
@@ -2661,7 +3127,8 @@ instruction.Semantics:
Access to the memory pointed to by the pointer is no longer defined -after this instruction executes.
+after this instruction executes. If the pointer is null, the operation +is a noop.Example:
@@ -2688,28 +3155,31 @@ after this instruction executes.The 'alloca' instruction allocates memory on the stack frame of the currently executing function, to be automatically released when this function -returns to its caller.
+returns to its caller. The object is always allocated in the generic address +space (address space zero).Arguments:
The 'alloca' instruction allocates sizeof(<type>)*NumElements bytes of memory on the runtime stack, returning a pointer of the -appropriate type to the program. If "NumElements" is specified, it is the -number of elements allocated. If an alignment is specified, the value result -of the allocation is guaranteed to be aligned to at least that boundary. If -not specified, or if zero, the target can choose to align the allocation on any -convenient boundary.
+appropriate type to the program. If "NumElements" is specified, it is the +number of elements allocated, otherwise "NumElements" is defaulted to be one. +If a constant alignment is specified, the value result of the allocation is guaranteed +to be aligned to at least that boundary. If not specified, or if zero, the target +can choose to align the allocation on any convenient boundary.'type' may be any sized type.
Semantics:
-Memory is allocated; a pointer is returned. 'alloca'd +
Memory is allocated; a pointer is returned. The operation is undefiend if +there is insufficient stack space for the allocation. 'alloca'd memory is automatically released when the function returns. The 'alloca' instruction is commonly used to represent automatic variables that must have an address available. When the function returns (either with the ret or unwind -instructions), the memory is reclaimed.
+instructions), the memory is reclaimed. Allocating zero bytes +is legal, but the result is undefined.Example:
@@ -2737,6 +3207,16 @@ marked as volatile, then the optimizer is not allowed to modify the number or order of execution of this load with other volatile load and store instructions. ++The optional constant "align" argument specifies the alignment of the operation +(that is, the alignment of the memory address). A value of 0 or an +omitted "align" argument means that the operation has the preferential +alignment for the target. It is the responsibility of the code emitter +to ensure that the alignment information is correct. Overestimating +the alignment results in an undefined behavior. Underestimating the +alignment may produce less efficient code. An alignment of 1 is always +safe. +
Semantics:
The location of memory pointed to is loaded.
Examples:
@@ -2759,19 +3239,29 @@ InstructionArguments:
There are two arguments to the 'store' instruction: a value to store and an address at which to store it. The type of the '<pointer>' -operand must be a pointer to the type of the '<value>' +operand must be a pointer to the first class type +of the '<value>' operand. If the store is marked as volatile, then the optimizer is not allowed to modify the number or order of execution of this store with other volatile load and store instructions.
++The optional constant "align" argument specifies the alignment of the operation +(that is, the alignment of the memory address). A value of 0 or an +omitted "align" argument means that the operation has the preferential +alignment for the target. It is the responsibility of the code emitter +to ensure that the alignment information is correct. Overestimating +the alignment results in an undefined behavior. Underestimating the +alignment may produce less efficient code. An alignment of 1 is always +safe. +
Semantics:
The contents of memory are updated to contain '<value>' at the location specified by the '<pointer>' operand.
Example:
%ptr = alloca i32 ; yields {i32*}:ptr - store i32 3, i32* %ptr ; yields {void} - %val = load i32* %ptr ; yields {i32}:val = i32 3 + store i32 3, i32* %ptr ; yields {void} + %val = load i32* %ptr ; yields {i32}:val = i32 3@@ -2800,8 +3290,8 @@ provided depend on the type of the first pointer argument. The 'getelementptr' instruction is used to index down through the type levels of a structure or to a specific index in an array. When indexing into a structure, only i32 integer constants are allowed. When indexing -into an array or pointer, only integers of 32 or 64 bits are allowed, and will -be sign extended to 64-bit values. +into an array or pointer, only integers of 32 or 64 bits are allowed; 32-bit +values will be sign extended to 64-bits if required.For example, let's consider a C code fragment and how it gets compiled to LLVM:
@@ -2846,8 +3336,8 @@ entry: on the pointer type that is being indexed into. Pointer and array types can use a 32-bit or 64-bit integer type but the value will always be sign extended -to 64-bits. Structure types require i32 -constants. +to 64-bits. Structure and packed +structure types require i32 constants.In the example above, the first index is indexing into the '%ST*' type, which is a pointer, yielding a '%ST' = '{ i32, double, %RT @@ -2876,7 +3366,7 @@ the LLVM code for the given testcase is equivalent to:
Note that it is undefined to access an array out of bounds: array and pointer indexes must always be within the defined bounds of the array type. -The one exception for this rules is zero length arrays. These arrays are +The one exception for this rule is zero length arrays. These arrays are defined to be accessible as variable length arrays, which requires access beyond the zero'th element.
@@ -3104,8 +3594,10 @@ unsigned integer equivalent of type ty2.Arguments:
The 'fptoui' instruction takes a value to cast, which must be a -floating point value, and a type to cast it to, which -must be an integer type.
+scalar or vector floating point value, and a type +to cast it to ty2, which must be an integer +type. If ty is a vector floating point type, ty2 must be a +vector integer type with the same number of elements as tySemantics:
The 'fptoui' instruction converts its @@ -3137,11 +3629,12 @@ the results are undefined.
floating point value to type ty2. -Arguments:
The 'fptosi' instruction takes a value to cast, which must be a -floating point value, and a type to cast it to, which -must also be an integer type.
+scalar or vector floating point value, and a type +to cast it to ty2, which must be an integer +type. If ty is a vector floating point type, ty2 must be a +vector integer type with the same number of elements as tySemantics:
The 'fptosi' instruction converts its @@ -3172,18 +3665,18 @@ the results are undefined.
The 'uitofp' instruction regards value as an unsigned integer and converts that value to the ty2 type.
-Arguments:
-The 'uitofp' instruction takes a value to cast, which must be an -integer value, and a type to cast it to, which must -be a floating point type.
+The 'uitofp' instruction takes a value to cast, which must be a +scalar or vector integer value, and a type to cast it +to ty2, which must be an floating point +type. If ty is a vector integer type, ty2 must be a vector +floating point type with the same number of elements as ty
Semantics:
The 'uitofp' instruction interprets its operand as an unsigned integer quantity and converts it to the corresponding floating point value. If the value cannot fit in the floating point value, the results are undefined.
-Example:
%X = uitofp i32 257 to float ; yields float:257.0 @@ -3207,9 +3700,11 @@ the value cannot fit in the floating point value, the results are undefined. integer and converts that value to the ty2 type.Arguments:
-The 'sitofp' instruction takes a value to cast, which must be an -integer value, and a type to cast it to, which must be -a floating point type.
+The 'sitofp' instruction takes a value to cast, which must be a +scalar or vector integer value, and a type to cast it +to ty2, which must be an floating point +type. If ty is a vector integer type, ty2 must be a vector +floating point type with the same number of elements as ty
Semantics:
The 'sitofp' instruction interprets its operand as a signed @@ -3307,15 +3802,20 @@ nothing is done (no-op cast).
Overview:
+The 'bitcast' instruction converts value to type ty2 without changing any bits.
Arguments:
+The 'bitcast' instruction takes a value to cast, which must be -a first class value, and a type to cast it to, which must also be a first class type. The bit sizes of value +a non-aggregate first class value, and a type to cast it to, which must also be +a non-aggregate first class type. The bit sizes of +value and the destination type, ty2, must be identical. If the source -type is a pointer, the destination type must also be a pointer.
+type is a pointer, the destination type must also be a pointer. This +instruction supports bitwise conversion of vectors to integers and to vectors +of other types (as long as they have the same size).Semantics:
The 'bitcast' instruction converts value to type @@ -3346,11 +3846,12 @@ instructions, which defy better classification.
Syntax:
-<result> = icmp <cond> <ty> <var1>, <var2> ; yields {i1}:result +<result> = icmp <cond> <ty> <op1>, <op2> ; yields {i1} or {<N x i1>}:resultOverview:
-The 'icmp' instruction returns a boolean value based on comparison -of its two integer operands.
+The 'icmp' instruction returns a boolean value or +a vector of boolean values based on comparison +of its two integer, integer vector, or pointer operands.
Arguments:
The 'icmp' instruction takes three operands. The first operand is the condition code indicating the kind of comparison to perform. It is not @@ -3368,11 +3869,13 @@ a value, just a keyword. The possible condition code are:
- sle: signed less or equal
The remaining two arguments must be integer or -pointer typed. They must also be identical types.
+pointer +or integer vector typed. +They must also be identical types.Semantics:
-The 'icmp' compares var1 and var2 according to +
The 'icmp' compares op1 and op2 according to the condition code given as cond. The comparison performed always -yields a i1 result, as follows: +yields either an i1 or vector of i1 result, as follows:
- eq: yields true if the operands are equal, false otherwise. No sign interpretation is necessary or performed. @@ -3380,24 +3883,29 @@ yields a i1 result, as follows:
- ne: yields true if the operands are unequal, false otherwise. No sign interpretation is necessary or performed.
- ugt: interprets the operands as unsigned values and yields - true if var1 is greater than var2.
+ true if op1 is greater than op2.- uge: interprets the operands as unsigned values and yields - true if var1 is greater than or equal to var2.
+ true if op1 is greater than or equal to op2.- ult: interprets the operands as unsigned values and yields - true if var1 is less than var2.
+ true if op1 is less than op2.- ule: interprets the operands as unsigned values and yields - true if var1 is less than or equal to var2.
+ true if op1 is less than or equal to op2.- sgt: interprets the operands as signed values and yields - true if var1 is greater than var2.
+ true if op1 is greater than op2.- sge: interprets the operands as signed values and yields - true if var1 is greater than or equal to var2.
+ true if op1 is greater than or equal to op2.- slt: interprets the operands as signed values and yields - true if var1 is less than var2.
+ true if op1 is less than op2.- sle: interprets the operands as signed values and yields - true if var1 is less than or equal to var2.
+ true if op1 is less than or equal to op2.If the operands are pointer typed, the pointer values are compared as if they were integers.
+If the operands are integer vectors, then they are compared +element by element. The result is an i1 vector with +the same number of elements as the values being compared. +Otherwise, the result is an i1. +
Example:
<result> = icmp eq i32 4, 5 ; yields: result=false @@ -3414,11 +3922,19 @@ values are compared as if they were integers.- + +Syntax:
-<result> = fcmp <cond> <ty> <var1>, <var2> ; yields {i1}:result +<result> = fcmp <cond> <ty> <op1>, <op2> ; yields {i1} or {<N x i1>}:resultOverview:
-The 'fcmp' instruction returns a boolean value based on comparison -of its floating point operands.
+The 'fcmp' instruction returns a boolean value +or vector of boolean values based on comparison +of its operands. +
+If the operands are floating point scalars, then the result +type is a boolean (i1). +
+If the operands are floating point vectors, then the result type +is a vector of boolean with the same number of elements as the +operands being compared.
Arguments:
The 'fcmp' instruction takes three operands. The first operand is the condition code indicating the kind of comparison to perform. It is not @@ -3443,77 +3959,195 @@ a value, just a keyword. The possible condition code are:
Ordered means that neither operand is a QNAN while unordered means that either operand may be a QNAN.
-The val1 and val2 arguments must be -floating point typed. They must have identical -types.
+Each of val1 and val2 arguments must be +either a floating point type +or a vector of floating point type. +They must have identical types.
Semantics:
-The 'fcmp' compares var1 and var2 according to -the condition code given as cond. The comparison performed always -yields a i1 result, as follows: +
The 'fcmp' instruction compares op1 and op2 +according to the condition code given as cond. +If the operands are vectors, then the vectors are compared +element by element. +Each comparison performed +always yields an i1 result, as follows:
- false: always yields false, regardless of operands.
- oeq: yields true if both operands are not a QNAN and - var1 is equal to var2.
+ op1 is equal to op2.- ogt: yields true if both operands are not a QNAN and - var1 is greather than var2.
+ op1 is greather than op2.- oge: yields true if both operands are not a QNAN and - var1 is greater than or equal to var2.
+ op1 is greater than or equal to op2.- olt: yields true if both operands are not a QNAN and - var1 is less than var2.
+ op1 is less than op2.- ole: yields true if both operands are not a QNAN and - var1 is less than or equal to var2.
+ op1 is less than or equal to op2.- one: yields true if both operands are not a QNAN and - var1 is not equal to var2.
+ op1 is not equal to op2.- ord: yields true if both operands are not a QNAN.
- ueq: yields true if either operand is a QNAN or - var1 is equal to var2.
+ op1 is equal to op2.- ugt: yields true if either operand is a QNAN or - var1 is greater than var2.
+ op1 is greater than op2.- uge: yields true if either operand is a QNAN or - var1 is greater than or equal to var2.
+ op1 is greater than or equal to op2.- ult: yields true if either operand is a QNAN or - var1 is less than var2.
+ op1 is less than op2.- ule: yields true if either operand is a QNAN or - var1 is less than or equal to var2.
+ op1 is less than or equal to op2.- une: yields true if either operand is a QNAN or - var1 is not equal to var2.
+ op1 is not equal to op2.- uno: yields true if either operand is a QNAN.
- true: always yields true, regardless of operands.
Example:
<result> = fcmp oeq float 4.0, 5.0 ; yields: result=false - <result> = icmp one float 4.0, 5.0 ; yields: result=true - <result> = icmp olt float 4.0, 5.0 ; yields: result=true - <result> = icmp ueq double 1.0, 2.0 ; yields: result=false + <result> = fcmp one float 4.0, 5.0 ; yields: result=true + <result> = fcmp olt float 4.0, 5.0 ; yields: result=true + <result> = fcmp ueq double 1.0, 2.0 ; yields: result=false++ + + +Syntax:
+<result> = vicmp <cond> <ty> <op1>, <op2> ; yields {ty}:result ++Overview:
+The 'vicmp' instruction returns an integer vector value based on +element-wise comparison of its two integer vector operands.
+Arguments:
+The 'vicmp' instruction takes three operands. The first operand is +the condition code indicating the kind of comparison to perform. It is not +a value, just a keyword. The possible condition code are: +
+
+- eq: equal
+- ne: not equal
+- ugt: unsigned greater than
+- uge: unsigned greater or equal
+- ult: unsigned less than
+- ule: unsigned less or equal
+- sgt: signed greater than
+- sge: signed greater or equal
+- slt: signed less than
+- sle: signed less or equal
+The remaining two arguments must be vector or +integer typed. They must also be identical types.
+Semantics:
+The 'vicmp' instruction compares op1 and op2 +according to the condition code given as cond. The comparison yields a +vector of integer result, of +identical type as the values being compared. The most significant bit in each +element is 1 if the element-wise comparison evaluates to true, and is 0 +otherwise. All other bits of the result are undefined. The condition codes +are evaluated identically to the 'icmp' +instruction. + +
Example:
++ <result> = vicmp eq <2 x i32> < i32 4, i32 0>, < i32 5, i32 0> ; yields: result=<2 x i32> < i32 0, i32 -1 > + <result> = vicmp ult <2 x i8 > < i8 1, i8 2>, < i8 2, i8 2 > ; yields: result=<2 x i8> < i8 -1, i8 0 > ++++ + + +Syntax:
+<result> = vfcmp <cond> <ty> <op1>, <op2>+Overview:
+The 'vfcmp' instruction returns an integer vector value based on +element-wise comparison of its two floating point vector operands. The output +elements have the same width as the input elements.
+Arguments:
+The 'vfcmp' instruction takes three operands. The first operand is +the condition code indicating the kind of comparison to perform. It is not +a value, just a keyword. The possible condition code are: +
+
+- false: no comparison, always returns false
+- oeq: ordered and equal
+- ogt: ordered and greater than
+- oge: ordered and greater than or equal
+- olt: ordered and less than
+- ole: ordered and less than or equal
+- one: ordered and not equal
+- ord: ordered (no nans)
+- ueq: unordered or equal
+- ugt: unordered or greater than
+- uge: unordered or greater than or equal
+- ult: unordered or less than
+- ule: unordered or less than or equal
+- une: unordered or not equal
+- uno: unordered (either nans)
+- true: no comparison, always returns true
+The remaining two arguments must be vector of +floating point typed. They must also be identical +types.
+Semantics:
+The 'vfcmp' instruction compares op1 and op2 +according to the condition code given as cond. The comparison yields a +vector of integer result, with +an identical number of elements as the values being compared, and each element +having identical with to the width of the floating point elements. The most +significant bit in each element is 1 if the element-wise comparison evaluates to +true, and is 0 otherwise. All other bits of the result are undefined. The +condition codes are evaluated identically to the +'fcmp' instruction. + +
Example:
++ <result> = vfcmp oeq <2 x float> < float 4, float 0 >, < float 5, float 0 > ; yields: result=<2 x i32> < i32 0, i32 -1 > + <result> = vfcmp ult <2 x double> < double 1, double 2 >, < double 2, double 2> ; yields: result=<2 x i64> < i64 -1, i64 0 > +++@@ -3526,7 +4160,9 @@ just prior to the current block.Syntax:
+<result> = phi <ty> [ <val0>, <label0>], ...Overview:
The 'phi' instruction is used to implement the φ node in the SSA graph representing the function.
Arguments:
+The type of the incoming values is specified with the first type field. After this, the 'phi' instruction takes a list of pairs as arguments, with one pair for each predecessor basic block of the current block. Only values of first class type may be used as the value arguments to the PHI node. Only labels may be used as the label arguments.
+There must be no non-phi instructions between the start of a basic block and the PHI instructions: i.e. PHI instructions must be first in a basic block.
+Semantics:
+At runtime, the 'phi' instruction logically takes on the value specified by the pair corresponding to the predecessor basic block that executed just prior to the current block.
+Example:
-Loop: ; Infinite loop that counts from 0 on up...+
%indvar = phi i32 [ 0, %LoopHeader ], [ %nextindvar, %Loop ]
%nextindvar = add i32 %indvar, 1
br label %Loop+Loop: ; Infinite loop that counts from 0 on up... + %indvar = phi i32 [ 0, %LoopHeader ], [ %nextindvar, %Loop ] + %nextindvar = add i32 %indvar, 1 + br label %Loop +Syntax:
- <result> = select i1 <cond>, <ty> <val1>, <ty> <val2> ; yields ty + <result> = select selty <cond>, <ty> <val1>, <ty> <val2> ; yields ty + + selty is either i1 or {<N x i1>}Overview:
@@ -3540,15 +4176,25 @@ condition, without branching.Arguments:
-The 'select' instruction requires a boolean value indicating the condition, and two values of the same first class type. +The 'select' instruction requires an 'i1' value or +a vector of 'i1' values indicating the +condition, and two values of the same first class +type. If the val1/val2 are vectors and +the condition is a scalar, then entire vectors are selected, not +individual elements.
Semantics:
-If the boolean condition evaluates to true, the instruction returns the first +If the condition is an i1 and it evaluates to 1, the instruction returns the first value argument; otherwise, it returns the second value argument.
++If the condition is a vector of i1, then the value arguments must +be vectors of the same size, and the selection is done element +by element. +
Example:
@@ -3624,17 +4270,23 @@ transfer to a specified function, with its incoming arguments bound to the specified values. Upon a 'ret' instruction in the called function, control flow continues with the instruction after the function call, and the return value of the -function is bound to the result argument. This is a simpler case of -the invoke instruction. +function is bound to the result argument. If the callee returns multiple +values then the return values of the function are only accessible through +the 'getresult' instruction.Example:
%retval = call i32 @test(i32 %argc) - call i32 (i8 *, ...)* @printf(i8 * %msg, i32 12, i8 42); - %X = tail call i32 @foo() - %Y = tail call fastcc i32 @foo() - %Z = call void %foo(i8 97 signext) + call i32 (i8 *, ...)* @printf(i8 * %msg, i32 12, i8 42) ; yields i32 + %X = tail call i32 @foo() ; yields i32 + %Y = tail call fastcc i32 @foo() ; yields i32 + call void %foo(i8 97 signext) + + %struct.A = type { i32, i8 } + %r = call %struct.A @foo() ; yields { 32, i8 } + %gr = getresult %struct.A %r, 0 ; yields i32 + %gr1 = getresult %struct.A %r, 1 ; yields i8@@ -3687,6 +4339,52 @@ argument. + + + ++ ++ @@ -3890,7 +4588,8 @@ example, memory allocation.Syntax:
++ <resultval> = getresult <type> <retval>, <index> ++ +Overview:
+ +The 'getresult' instruction is used to extract individual values +from a 'call' +or 'invoke' instruction that returns multiple +results.
+ +Arguments:
+ +The 'getresult' instruction takes a call or invoke value as its +first argument, or an undef value. The value must have structure type. The second argument is a constant +unsigned index value which must be in range for the number of values returned +by the call.
+ +Semantics:
+ +The 'getresult' instruction extracts the element identified by +'index' from the aggregate value.
+ +Example:
+ ++ %struct.A = type { i32, i8 } + + %r = call %struct.A @foo() + %gr = getresult %struct.A %r, 0 ; yields i32:%gr + %gr1 = getresult %struct.A %r, 1 ; yields i8:%gr1 + add i32 %gr, 42 + add i8 %gr1, 41 ++ +LLVM support for Accurate Garbage -Collection requires the implementation and generation of these intrinsics. +Collection (GC) requires the implementation and generation of these +intrinsics. These intrinsics allow identification of GC roots on the stack, as well as garbage collector implementations that require read and write barriers. @@ -3898,6 +4597,10 @@ Front-ends for type-safe garbage collected languages should generate these intrinsics to make use of the LLVM garbage collectors. For more details, see Accurate Garbage Collection with LLVM.
+ +The garbage collection intrinsics only operate on objects in the generic + address space (address space zero).
+ @@ -3926,10 +4629,11 @@ value address) contains the meta-data to be associated with the root.Semantics:
-At runtime, a call to this intrinsics stores a null pointer into the "ptrloc" +
At runtime, a call to this intrinsic stores a null pointer into the "ptrloc" location. At compile-time, the code generator generates information to allow -the runtime to find the pointer at GC safe points. -
+the runtime to find the pointer at GC safe points. The 'llvm.gcroot' +intrinsic may only be used in a function which specifies a GC +algorithm. @@ -3964,7 +4668,9 @@ null).The 'llvm.gcread' intrinsic has the same semantics as a load instruction, but may be replaced with substantially more complex code by the -garbage collector runtime, as needed.
+garbage collector runtime, as needed. The 'llvm.gcread' intrinsic +may only be used in a function which specifies a GC +algorithm. @@ -3999,7 +4705,9 @@ null.The 'llvm.gcwrite' intrinsic has the same semantics as a store instruction, but may be replaced with substantially more complex code by the -garbage collector runtime, as needed.
+garbage collector runtime, as needed. The 'llvm.gcwrite' intrinsic +may only be used in a function which specifies a GC +algorithm. @@ -4233,11 +4941,12 @@ performance.The 'llvm.pcmarker' intrinsic is a method to export a Program Counter -(PC) in a region of -code to simulators and other tools. The method is target specific, but it is -expected that the marker will use exported symbols to transmit the PC of the marker. -The marker makes no guarantees that it will remain with any specific instruction -after optimizations. It is possible that the presence of a marker will inhibit +(PC) in a region of +code to simulators and other tools. The method is target specific, but it is +expected that the marker will use exported symbols to transmit the PC of the +marker. +The marker makes no guarantees that it will remain with any specific instruction +after optimizations. It is possible that the presence of a marker will inhibit optimizations. The intended use is to be inserted after optimizations to allow correlations of simulation runs.
@@ -4379,7 +5088,7 @@ be set to 0 or 1.The 'llvm.memmove.*' intrinsics move a block of memory from the source location to the destination location. It is similar to the -'llvm.memcmp' intrinsic but allows the two memory locations to overlap. +'llvm.memcpy' intrinsic but allows the two memory locations to overlap.
@@ -4476,7 +5185,8 @@ this can be specified as the fourth argument, otherwise it should be set to 0 or
Syntax:
This is an overloaded intrinsic. You can use llvm.sqrt on any -floating point type. Not all targets support all types however. +floating point or vector of floating point type. Not all targets support all +types however.
declare float @llvm.sqrt.f32(float %Val) declare double @llvm.sqrt.f64(double %Val) @@ -4489,9 +5199,11 @@ floating point type. Not all targets support all types however.The 'llvm.sqrt' intrinsics return the sqrt of the specified operand, -returning the same value as the libm 'sqrt' function would. Unlike +returning the same value as the libm 'sqrt' functions would. Unlike sqrt in libm, however, llvm.sqrt has undefined behavior for -negative numbers (which allows for better optimization). +negative numbers other than -0.0 (which allows for better optimization, because +there is no need to worry about errno being set). llvm.sqrt(-0.0) is +defined to return -0.0 like IEEE sqrt.
Arguments:
@@ -4517,7 +5229,8 @@ floating point number.Syntax:
This is an overloaded intrinsic. You can use llvm.powi on any -floating point type. Not all targets support all types however. +floating point or vector of floating point type. Not all targets support all +types however.
declare float @llvm.powi.f32(float %Val, i32 %power) declare double @llvm.powi.f64(double %Val, i32 %power) @@ -4531,7 +5244,8 @@ floating point type. Not all targets support all types however.The 'llvm.powi.*' intrinsics return the first operand raised to the specified (positive or negative) power. The order of evaluation of -multiplications is not defined. +multiplications is not defined. When a vector of floating point type is +used, the second argument remains a scalar integer value.
Arguments:
@@ -4548,42 +5262,162 @@ This function returns the first value raised to the second power with an unspecified sequence of rounding operations. - - - - ----LLVM provides intrinsics for a few important bit manipulation operations. -These allow efficient code generation for some algorithms. -
- -+ + + + +Syntax:
-This is an overloaded intrinsic function. You can use bswap on any integer -type that is an even number of bytes (i.e. BitWidth % 16 == 0). +
This is an overloaded intrinsic. You can use llvm.sin on any +floating point or vector of floating point type. Not all targets support all +types however.
- declare i16 @llvm.bswap.i16(i16 <id>) - declare i32 @llvm.bswap.i32(i32 <id>) - declare i64 @llvm.bswap.i64(i64 <id>) + declare float @llvm.sin.f32(float %Val) + declare double @llvm.sin.f64(double %Val) + declare x86_fp80 @llvm.sin.f80(x86_fp80 %Val) + declare fp128 @llvm.sin.f128(fp128 %Val) + declare ppc_fp128 @llvm.sin.ppcf128(ppc_fp128 %Val)Overview:
-The 'llvm.bswap' family of intrinsics is used to byte swap integer -values with an even number of bytes (positive multiple of 16 bits). These are -useful for performing operations on data that is not in the target's native +The 'llvm.sin.*' intrinsics return the sine of the operand. +
+ +Arguments:
+ ++The argument and return value are floating point numbers of the same type. +
+ +Semantics:
+ ++This function returns the sine of the specified operand, returning the +same values as the libm sin functions would, and handles error +conditions in the same way.
++ ++ + + + +Syntax:
+This is an overloaded intrinsic. You can use llvm.cos on any +floating point or vector of floating point type. Not all targets support all +types however. +
+ declare float @llvm.cos.f32(float %Val) + declare double @llvm.cos.f64(double %Val) + declare x86_fp80 @llvm.cos.f80(x86_fp80 %Val) + declare fp128 @llvm.cos.f128(fp128 %Val) + declare ppc_fp128 @llvm.cos.ppcf128(ppc_fp128 %Val) ++ +Overview:
+ ++The 'llvm.cos.*' intrinsics return the cosine of the operand. +
+ +Arguments:
+ ++The argument and return value are floating point numbers of the same type. +
+ +Semantics:
+ ++This function returns the cosine of the specified operand, returning the +same values as the libm cos functions would, and handles error +conditions in the same way.
++ ++ + + + + +Syntax:
+This is an overloaded intrinsic. You can use llvm.pow on any +floating point or vector of floating point type. Not all targets support all +types however. +
+ declare float @llvm.pow.f32(float %Val, float %Power) + declare double @llvm.pow.f64(double %Val, double %Power) + declare x86_fp80 @llvm.pow.f80(x86_fp80 %Val, x86_fp80 %Power) + declare fp128 @llvm.pow.f128(fp128 %Val, fp128 %Power) + declare ppc_fp128 @llvm.pow.ppcf128(ppc_fp128 %Val, ppc_fp128 Power) ++ +Overview:
+ ++The 'llvm.pow.*' intrinsics return the first operand raised to the +specified (positive or negative) power. +
+ +Arguments:
+ ++The second argument is a floating point power, and the first is a value to +raise to that power. +
+ +Semantics:
+ ++This function returns the first value raised to the second power, +returning the +same values as the libm pow functions would, and handles error +conditions in the same way.
+++ + + + ++LLVM provides intrinsics for a few important bit manipulation operations. +These allow efficient code generation for some algorithms. +
+ ++ ++ + + +Syntax:
+This is an overloaded intrinsic function. You can use bswap on any integer +type that is an even number of bytes (i.e. BitWidth % 16 == 0). +
+ declare i16 @llvm.bswap.i16(i16 <id>) + declare i32 @llvm.bswap.i32(i32 <id>) + declare i64 @llvm.bswap.i64(i64 <id>) ++ +Overview:
+ ++The 'llvm.bswap' family of intrinsics is used to byte swap integer +values with an even number of bytes (positive multiple of 16 bits). These are +useful for performing operations on data that is not in the target's native byte order.
@@ -4922,6 +5756,500 @@ declare i8* @llvm.init.trampoline(i8* <tramp>, i8* <func>, i8* <n++ + + ++ These intrinsic functions expand the "universal IR" of LLVM to represent + hardware constructs for atomic operations and memory synchronization. This + provides an interface to the hardware, not an interface to the programmer. It + is aimed at a low enough level to allow any programming models or APIs + (Application Programming Interfaces) which + need atomic behaviors to map cleanly onto it. It is also modeled primarily on + hardware behavior. Just as hardware provides a "universal IR" for source + languages, it also provides a starting point for developing a "universal" + atomic operation and synchronization IR. +
++ These do not form an API such as high-level threading libraries, + software transaction memory systems, atomic primitives, and intrinsic + functions as found in BSD, GNU libc, atomic_ops, APR, and other system and + application libraries. The hardware interface provided by LLVM should allow + a clean implementation of all of these APIs and parallel programming models. + No one model or paradigm should be selected above others unless the hardware + itself ubiquitously does so. + +
+++ + + +Syntax:
++declare void @llvm.memory.barrier( i1 <ll>, i1 <ls>, i1 <sl>, i1 <ss>, +i1 <device> ) + ++Overview:
++ The llvm.memory.barrier intrinsic guarantees ordering between + specific pairs of memory access types. +
+Arguments:
++ The llvm.memory.barrier intrinsic requires five boolean arguments. + The first four arguments enables a specific barrier as listed below. The fith + argument specifies that the barrier applies to io or device or uncached memory. + +
++
+- ll: load-load barrier
+- ls: load-store barrier
+- sl: store-load barrier
+- ss: store-store barrier
+- device: barrier applies to device and uncached memory also. +
Semantics:
++ This intrinsic causes the system to enforce some ordering constraints upon + the loads and stores of the program. This barrier does not indicate + when any events will occur, it only enforces an order in + which they occur. For any of the specified pairs of load and store operations + (f.ex. load-load, or store-load), all of the first operations preceding the + barrier will complete before any of the second operations succeeding the + barrier begin. Specifically the semantics for each pairing is as follows: +
++
+- ll: All loads before the barrier must complete before any load + after the barrier begins.
+ +- ls: All loads before the barrier must complete before any + store after the barrier begins.
+- ss: All stores before the barrier must complete before any + store after the barrier begins.
+- sl: All stores before the barrier must complete before any + load after the barrier begins.
++ These semantics are applied with a logical "and" behavior when more than one + is enabled in a single memory barrier intrinsic. +
++ Backends may implement stronger barriers than those requested when they do not + support as fine grained a barrier as requested. Some architectures do not + need all types of barriers and on such architectures, these become noops. +
+Example:
++%ptr = malloc i32 + store i32 4, %ptr + +%result1 = load i32* %ptr ; yields {i32}:result1 = 4 + call void @llvm.memory.barrier( i1 false, i1 true, i1 false, i1 false ) + ; guarantee the above finishes + store i32 8, %ptr ; before this begins ++++ + + +Syntax:
++ This is an overloaded intrinsic. You can use llvm.atomic.cmp.swap on + any integer bit width and for different address spaces. Not all targets + support all bit widths however.
+ ++declare i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* <ptr>, i8 <cmp>, i8 <val> ) +declare i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* <ptr>, i16 <cmp>, i16 <val> ) +declare i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* <ptr>, i32 <cmp>, i32 <val> ) +declare i64 @llvm.atomic.cmp.swap.i64.p0i64( i64* <ptr>, i64 <cmp>, i64 <val> ) + ++Overview:
++ This loads a value in memory and compares it to a given value. If they are + equal, it stores a new value into the memory. +
+Arguments:
++ The llvm.atomic.cmp.swap intrinsic takes three arguments. The result as + well as both cmp and val must be integer values with the + same bit width. The ptr argument must be a pointer to a value of + this integer type. While any bit width integer may be used, targets may only + lower representations they support in hardware. + +
+Semantics:
++ This entire intrinsic must be executed atomically. It first loads the value + in memory pointed to by ptr and compares it with the value + cmp. If they are equal, val is stored into the memory. The + loaded value is yielded in all cases. This provides the equivalent of an + atomic compare-and-swap operation within the SSA framework. +
+Examples:
+ ++%ptr = malloc i32 + store i32 4, %ptr + +%val1 = add i32 4, 4 +%result1 = call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %ptr, i32 4, %val1 ) + ; yields {i32}:result1 = 4 +%stored1 = icmp eq i32 %result1, 4 ; yields {i1}:stored1 = true +%memval1 = load i32* %ptr ; yields {i32}:memval1 = 8 + +%val2 = add i32 1, 1 +%result2 = call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %ptr, i32 5, %val2 ) + ; yields {i32}:result2 = 8 +%stored2 = icmp eq i32 %result2, 5 ; yields {i1}:stored2 = false + +%memval2 = load i32* %ptr ; yields {i32}:memval2 = 8 ++++ + + +Syntax:
+ ++ This is an overloaded intrinsic. You can use llvm.atomic.swap on any + integer bit width. Not all targets support all bit widths however.
++declare i8 @llvm.atomic.swap.i8.p0i8( i8* <ptr>, i8 <val> ) +declare i16 @llvm.atomic.swap.i16.p0i16( i16* <ptr>, i16 <val> ) +declare i32 @llvm.atomic.swap.i32.p0i32( i32* <ptr>, i32 <val> ) +declare i64 @llvm.atomic.swap.i64.p0i64( i64* <ptr>, i64 <val> ) + ++Overview:
++ This intrinsic loads the value stored in memory at ptr and yields + the value from memory. It then stores the value in val in the memory + at ptr. +
+Arguments:
+ ++ The llvm.atomic.swap intrinsic takes two arguments. Both the + val argument and the result must be integers of the same bit width. + The first argument, ptr, must be a pointer to a value of this + integer type. The targets may only lower integer representations they + support. +
+Semantics:
++ This intrinsic loads the value pointed to by ptr, yields it, and + stores val back into ptr atomically. This provides the + equivalent of an atomic swap operation within the SSA framework. + +
+Examples:
++%ptr = malloc i32 + store i32 4, %ptr + +%val1 = add i32 4, 4 +%result1 = call i32 @llvm.atomic.swap.i32.p0i32( i32* %ptr, i32 %val1 ) + ; yields {i32}:result1 = 4 +%stored1 = icmp eq i32 %result1, 4 ; yields {i1}:stored1 = true +%memval1 = load i32* %ptr ; yields {i32}:memval1 = 8 + +%val2 = add i32 1, 1 +%result2 = call i32 @llvm.atomic.swap.i32.p0i32( i32* %ptr, i32 %val2 ) + ; yields {i32}:result2 = 8 + +%stored2 = icmp eq i32 %result2, 8 ; yields {i1}:stored2 = true +%memval2 = load i32* %ptr ; yields {i32}:memval2 = 2 ++++ + + +Syntax:
++ This is an overloaded intrinsic. You can use llvm.atomic.load.add on any + integer bit width. Not all targets support all bit widths however.
++declare i8 @llvm.atomic.load.add.i8..p0i8( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.add.i16..p0i16( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.add.i32..p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.add.i64..p0i64( i64* <ptr>, i64 <delta> ) + ++Overview:
++ This intrinsic adds delta to the value stored in memory at + ptr. It yields the original value at ptr. +
+Arguments:
++ + The intrinsic takes two arguments, the first a pointer to an integer value + and the second an integer value. The result is also an integer value. These + integer types can have any bit width, but they must all have the same bit + width. The targets may only lower integer representations they support. +
+Semantics:
++ This intrinsic does a series of operations atomically. It first loads the + value stored at ptr. It then adds delta, stores the result + to ptr. It yields the original value stored at ptr. +
+ +Examples:
++%ptr = malloc i32 + store i32 4, %ptr +%result1 = call i32 @llvm.atomic.load.add.i32.p0i32( i32* %ptr, i32 4 ) + ; yields {i32}:result1 = 4 +%result2 = call i32 @llvm.atomic.load.add.i32.p0i32( i32* %ptr, i32 2 ) + ; yields {i32}:result2 = 8 +%result3 = call i32 @llvm.atomic.load.add.i32.p0i32( i32* %ptr, i32 5 ) + ; yields {i32}:result3 = 10 +%memval1 = load i32* %ptr ; yields {i32}:memval1 = 15 ++++ + +Syntax:
++ This is an overloaded intrinsic. You can use llvm.atomic.load.sub on + any integer bit width and for different address spaces. Not all targets + support all bit widths however.
++declare i8 @llvm.atomic.load.sub.i8.p0i32( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.sub.i16.p0i32( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.sub.i32.p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.sub.i64.p0i32( i64* <ptr>, i64 <delta> ) + ++Overview:
++ This intrinsic subtracts delta to the value stored in memory at + ptr. It yields the original value at ptr. +
+Arguments:
++ + The intrinsic takes two arguments, the first a pointer to an integer value + and the second an integer value. The result is also an integer value. These + integer types can have any bit width, but they must all have the same bit + width. The targets may only lower integer representations they support. +
+Semantics:
++ This intrinsic does a series of operations atomically. It first loads the + value stored at ptr. It then subtracts delta, stores the + result to ptr. It yields the original value stored at ptr. +
+ +Examples:
++%ptr = malloc i32 + store i32 8, %ptr +%result1 = call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %ptr, i32 4 ) + ; yields {i32}:result1 = 8 +%result2 = call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %ptr, i32 2 ) + ; yields {i32}:result2 = 4 +%result3 = call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %ptr, i32 5 ) + ; yields {i32}:result3 = 2 +%memval1 = load i32* %ptr ; yields {i32}:memval1 = -3 +++ 'llvm.atomic.load.and.*' Intrinsic+
+ 'llvm.atomic.load.nand.*' Intrinsic
+ 'llvm.atomic.load.or.*' Intrinsic
+ 'llvm.atomic.load.xor.*' Intrinsic
+ +++ + + +Syntax:
++ These are overloaded intrinsics. You can use llvm.atomic.load_and, + llvm.atomic.load_nand, llvm.atomic.load_or, and + llvm.atomic.load_xor on any integer bit width and for different + address spaces. Not all targets support all bit widths however.
++declare i8 @llvm.atomic.load.and.i8.p0i8( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.and.i16.p0i16( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.and.i32.p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.and.i64.p0i64( i64* <ptr>, i64 <delta> ) + ++ ++declare i8 @llvm.atomic.load.or.i8.p0i8( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.or.i16.p0i16( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.or.i32.p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.or.i64.p0i64( i64* <ptr>, i64 <delta> ) + ++ ++declare i8 @llvm.atomic.load.nand.i8.p0i32( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.nand.i16.p0i32( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.nand.i32.p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.nand.i64.p0i32( i64* <ptr>, i64 <delta> ) + ++ ++declare i8 @llvm.atomic.load.xor.i8.p0i32( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.xor.i16.p0i32( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.xor.i32.p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.xor.i64.p0i32( i64* <ptr>, i64 <delta> ) + ++Overview:
++ These intrinsics bitwise the operation (and, nand, or, xor) delta to + the value stored in memory at ptr. It yields the original value + at ptr. +
+Arguments:
++ + These intrinsics take two arguments, the first a pointer to an integer value + and the second an integer value. The result is also an integer value. These + integer types can have any bit width, but they must all have the same bit + width. The targets may only lower integer representations they support. +
+Semantics:
++ These intrinsics does a series of operations atomically. They first load the + value stored at ptr. They then do the bitwise operation + delta, store the result to ptr. They yield the original + value stored at ptr. +
+ +Examples:
++%ptr = malloc i32 + store i32 0x0F0F, %ptr +%result0 = call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %ptr, i32 0xFF ) + ; yields {i32}:result0 = 0x0F0F +%result1 = call i32 @llvm.atomic.load.and.i32.p0i32( i32* %ptr, i32 0xFF ) + ; yields {i32}:result1 = 0xFFFFFFF0 +%result2 = call i32 @llvm.atomic.load.or.i32.p0i32( i32* %ptr, i32 0F ) + ; yields {i32}:result2 = 0xF0 +%result3 = call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %ptr, i32 0F ) + ; yields {i32}:result3 = FF +%memval1 = load i32* %ptr ; yields {i32}:memval1 = F0 +++ 'llvm.atomic.load.max.*' Intrinsic+
+ 'llvm.atomic.load.min.*' Intrinsic
+ 'llvm.atomic.load.umax.*' Intrinsic
+ 'llvm.atomic.load.umin.*' Intrinsic
+ +++Syntax:
++ These are overloaded intrinsics. You can use llvm.atomic.load_max, + llvm.atomic.load_min, llvm.atomic.load_umax, and + llvm.atomic.load_umin on any integer bit width and for different + address spaces. Not all targets + support all bit widths however.
++declare i8 @llvm.atomic.load.max.i8.p0i8( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.max.i16.p0i16( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.max.i32.p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.max.i64.p0i64( i64* <ptr>, i64 <delta> ) + ++ ++declare i8 @llvm.atomic.load.min.i8.p0i8( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.min.i16.p0i16( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.min.i32..p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.min.i64..p0i64( i64* <ptr>, i64 <delta> ) + ++ ++declare i8 @llvm.atomic.load.umax.i8.p0i8( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.umax.i16.p0i16( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.umax.i32.p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.umax.i64.p0i64( i64* <ptr>, i64 <delta> ) + ++ ++declare i8 @llvm.atomic.load.umin.i8..p0i8( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.umin.i16.p0i16( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.umin.i32..p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.umin.i64..p0i64( i64* <ptr>, i64 <delta> ) + ++Overview:
++ These intrinsics takes the signed or unsigned minimum or maximum of + delta and the value stored in memory at ptr. It yields the + original value at ptr. +
+Arguments:
++ + These intrinsics take two arguments, the first a pointer to an integer value + and the second an integer value. The result is also an integer value. These + integer types can have any bit width, but they must all have the same bit + width. The targets may only lower integer representations they support. +
+Semantics:
++ These intrinsics does a series of operations atomically. They first load the + value stored at ptr. They then do the signed or unsigned min or max + delta and the value, store the result to ptr. They yield + the original value stored at ptr. +
+ +Examples:
++%ptr = malloc i32 + store i32 7, %ptr +%result0 = call i32 @llvm.atomic.load.min.i32.p0i32( i32* %ptr, i32 -2 ) + ; yields {i32}:result0 = 7 +%result1 = call i32 @llvm.atomic.load.max.i32.p0i32( i32* %ptr, i32 8 ) + ; yields {i32}:result1 = -2 +%result2 = call i32 @llvm.atomic.load.umin.i32.p0i32( i32* %ptr, i32 10 ) + ; yields {i32}:result2 = 8 +%result3 = call i32 @llvm.atomic.load.umax.i32.p0i32( i32* %ptr, i32 30 ) + ; yields {i32}:result3 = 8 +%memval1 = load i32* %ptr ; yields {i32}:memval1 = 30 ++General Intrinsics @@ -4961,10 +6289,11 @@ file name, and the last argument is the line number.@@ -5010,17 +6339,51 @@ that want to look for these annotations. These have no other defined use, they are ignored by code generation and optimization. + + + +Semantics:
-This intrinsic allows annotation of local variables with arbitrary strings. +This intrinsic allows annotation of local variables with arbitrary strings. This can be useful for special purpose optimizations that want to look for these - annotations. These have no other defined use, they are ignored by code - generation and optimization. +annotations. These have no other defined use, they are ignored by code +generation and optimization. +
+ ++Syntax:
++ declare void @llvm.trap() ++ +Overview:
+ ++The 'llvm.trap' intrinsic +
+ +Arguments:
+ ++None +
+ +Semantics:
+ ++This intrinsics is lowered to the target dependent trap instruction. If the +target does not have a trap instruction, this intrinsic will be lowered to the +call of the abort() function. +
+
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+ src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!"> Chris Lattner
The LLVM Compiler Infrastructure
Last modified: $Date$ +