This document is a reference manual for the LLVM assembly language. -LLVM is an SSA based representation that provides type safety, -low-level operations, flexibility, and the capability of representing -'all' high-level languages cleanly. It is the common code +LLVM is a Static Single Assignment (SSA) based representation that provides +type safety, low-level operations, flexibility, and the capability of +representing 'all' high-level languages cleanly. It is the common code representation used throughout all phases of the LLVM compilation strategy.
The next two types of linkage are targeted for Microsoft Windows platform only. They are designed to support importing (exporting) symbols from (to) - DLLs. + DLLs (Dynamic Link Libraries).
A function definition contains a list of basic blocks, forming the CFG for +
A function definition contains a list of basic blocks, forming the CFG +(Control Flow Graph) for the function. Each basic block may optionally start with a label (giving the basic block a symbol table entry), contains a list of instructions, and ends with a terminator instruction (such as a branch or @@ -763,15 +794,15 @@ a power of 2.
Aliases act as "second name" for the aliasee value (which can be either - function or global variable or bitcast of global value). Aliases may have an - optional linkage type, and an + function, global variable, another alias or bitcast of global value). Aliases + may have an optional linkage type, and an optional visibility style.
-@<Name> = [Linkage] [Visibility] alias <AliaseeTy> @<Aliasee> +@<Name> = alias [Linkage] [Visibility] <AliaseeTy> @<Aliasee>
-declare i32 @printf(i8* noalias , ...) nounwind -declare i32 @atoi(i8*) nounwind readonly +declare i32 @printf(i8* noalias , ...) +declare i32 @atoi(i8 zeroext*)
Function attributes are set to communicate additional information about + a function. Function attributes are considered to be part of the function, + not of the function type, so functions with different parameter attributes + can have the same function type.
+ +Function attributes are simple keywords that follow the type specified. If + multiple attributes are needed, they are space separated. For + example:
+ +
+define void @f() noinline { ... }
+define void @f() alwaysinline { ... }
+define void @f() alwaysinline optsize { ... }
+define void @f() optsize
+
+When llvm is determining the alignment for a given type, it uses the +
When LLVM is determining the alignment for a given type, it uses the following rules:
The LLVM type system is one of the most important features of the intermediate representation. Being typed enables a number of -optimizations to be performed on the IR directly, without having to do +optimizations to be performed on the intermediate representation directly, +without having to do extra analyses on the side before the transformation. A strong type system makes it easier to read the generated code and enables novel analyses and transformations that are not feasible to perform on normal @@ -1027,14 +1104,16 @@ classifications:
The first class types are perhaps the most important. Values of these types are the only ones which can be produced by instructions, passed as arguments, or used as operands to -instructions. This means that all structures and arrays must be -manipulated either by pointer or by component.
+instructions. @@ -1223,15 +1301,21 @@ type "{ i32, [0 x float]}", for example.The function type can be thought of as a function signature. It -consists of a return type and a list of formal parameter types. -Function types are usually used to build virtual function tables -(which are structures of pointers to functions), for indirect function -calls, and when defining a function.
+consists of a return type and a list of formal parameter types. The +return type of a function type is a scalar type, a void type, or a struct type. +If the return type is a struct type then all struct elements must be of first +class types, and the struct must have at least one element.<returntype list> (<parameter list>)+ +
+ <returntype list> (<parameter list>) ++
...where '<parameter list>' is a comma-separated list of type specifiers. Optionally, the parameter list may include a type ..., which indicates that the function takes a variable number of arguments. @@ -1239,6 +1323,7 @@ Variable argument functions can access their arguments with the variable argument handling intrinsic functions. '<returntype list>' is a comma-separated list of first class type specifiers.
+| {i32, i32} (i32) | +A function taking an i32>, returning two + i32 values as an aggregate of type { i32, i32 } + |
The 'ret' instruction is used to return control flow (and a value) from a function back to the caller.
There are two forms of the 'ret' instruction: one that -returns a value and then causes control flow, and one that just causes +returns value(s) and then causes control flow, and one that just causes control flow to occur.
+The 'ret' instruction may return one or multiple values. The -type of each return value must be a 'first class' - type. Note that a function is not well formed -if there exists a 'ret' instruction inside of the function that -returns values that do not match the return type of the function.
+ +The 'ret' instruction may return zero, one or multiple values. +The type of each return value must be a 'first +class' type. Note that a function is not well +formed if there exists a 'ret' instruction inside of the +function that returns values that do not match the return type of the +function.
+When the 'ret' instruction is executed, control flow returns back to the calling function's context. If the caller is a "call" instruction, execution continues at @@ -1816,8 +1923,11 @@ returns a value, that value shall set the call or invoke instruction's return value. If the instruction returns multiple values then these values can only be accessed through a 'getresult ' instruction.
+ret i32 5 ; Return an integer value of 5 + ++ ret i32 5 ; Return an integer value of 5 ret void ; Return from a void function ret i32 4, i8 2 ; Return two values 4 and 2@@ -2008,7 +2118,7 @@ primarily used to implement exception handling.Semantics:
-The 'unwind' intrinsic causes execution of the current function to +
The 'unwind' instruction causes execution of the current function to immediately halt. The dynamic call stack is then searched for the first invoke instruction on the call stack. Once found, execution continues at the "exceptional" destination block specified by the @@ -2046,90 +2156,128 @@ no-return function cannot be reached, and other facts.
- + +Binary operators are used to do most of the computation in a -program. They require two operands, execute an operation on them, and +program. They require two operands of the same type, execute an operation on them, and produce a single value. The operands might represent multiple data, as is the case with the vector data type. -The result value of a binary operator is not -necessarily the same type as its operands.
+The result value has the same type as its operands.There are several different binary operators:
+- + +Syntax:
-<result> = add <ty> <var1>, <var2> ; yields {ty}:result + ++ <result> = add <ty> <op1>, <op2> ; yields {ty}:result+Overview:
+The 'add' instruction returns the sum of its two operands.
+Arguments:
-The two arguments to the 'add' instruction must be either integer or floating point values. - This instruction can also take vector versions of the values. -Both arguments must have identical types.
+ +The two arguments to the 'add' instruction must be integer, floating point, or + vector values. Both arguments must have identical + types.
+Semantics:
+The value produced is the integer or floating point sum of the two operands.
+If an integer sum has unsigned overflow, the result returned is the mathematical result modulo 2n, where n is the bit width of the result.
+Because LLVM integers use a two's complement representation, this instruction is appropriate for both signed and unsigned integers.
+Example:
-<result> = add i32 4, %var ; yields {i32}:result = 4 + %var + ++ <result> = add i32 4, %var ; yields {i32}:result = 4 + %var++ - + +Syntax:
-<result> = sub <ty> <var1>, <var2> ; yields {ty}:result + ++ <result> = sub <ty> <op1>, <op2> ; yields {ty}:result+Overview:
+The 'sub' instruction returns the difference of its two operands.
-Note that the 'sub' instruction is used to represent the 'neg' -instruction present in most other intermediate representations.
+ +Note that the 'sub' instruction is used to represent the +'neg' instruction present in most other intermediate +representations.
+Arguments:
-The two arguments to the 'sub' instruction must be either integer or floating point -values. -This instruction can also take vector versions of the values. -Both arguments must have identical types.
+ +The two arguments to the 'sub' instruction must be integer, floating point, + or vector values. Both arguments must have identical + types.
+Semantics:
+The value produced is the integer or floating point difference of the two operands.
+If an integer difference has unsigned overflow, the result returned is the mathematical result modulo 2n, where n is the bit width of the result.
+Because LLVM integers use a two's complement representation, this instruction is appropriate for both signed and unsigned integers.
+Example:
<result> = sub i32 4, %var ; yields {i32}:result = 4 - %var <result> = sub i32 0, %val ; yields {i32}:result = -%var++Syntax:
-<result> = mul <ty> <var1>, <var2> ; yields {ty}:result +<result> = mul <ty> <op1>, <op2> ; yields {ty}:resultOverview:
The 'mul' instruction returns the product of its two operands.
+Arguments:
-The two arguments to the 'mul' instruction must be either integer or floating point -values. -This instruction can also take vector versions of the values. -Both arguments must have identical types.
+ +The two arguments to the 'mul' instruction must be integer, floating point, +or vector values. Both arguments must have identical +types.
+Semantics:
+The value produced is the integer or floating point product of the two operands.
+If the result of an integer multiplication has unsigned overflow, the result returned is the mathematical result modulo 2n, where n is the bit width of the result.
@@ -2143,22 +2291,26 @@ width of the full product.<result> = mul i32 4, %var ; yields {i32}:result = 4 * %varSyntax:
-<result> = udiv <ty> <var1>, <var2> ; yields {ty}:result +<result> = udiv <ty> <op1>, <op2> ; yields {ty}:resultOverview:
The 'udiv' instruction returns the quotient of its two operands.
+Arguments:
+The two arguments to the 'udiv' instruction must be -integer values. Both arguments must have identical -types. This instruction can also take vector versions -of the values in which case the elements must be integers.
+integer or vector of integer +values. Both arguments must have identical types. +Semantics:
+The value produced is the unsigned integer quotient of the two operands.
Note that unsigned integer division and signed integer division are distinct operations; for signed integer division, use 'sdiv'.
@@ -2172,18 +2324,23 @@ operations; for signed integer division, use 'sdiv'.Syntax:
-<result> = sdiv <ty> <var1>, <var2> ; yields {ty}:result ++ <result> = sdiv <ty> <op1>, <op2> ; yields {ty}:result+Overview:
+The 'sdiv' instruction returns the quotient of its two operands.
+Arguments:
-The two arguments to the 'sdiv' instruction must be -integer values. Both arguments must have identical -types. This instruction can also take vector versions -of the values in which case the elements must be integers.
+ +The two arguments to the 'sdiv' instruction must be +integer or vector of integer +values. Both arguments must have identical types.
+Semantics:
-The value produced is the signed integer quotient of the two operands.
+The value produced is the signed integer quotient of the two operands rounded towards zero.
Note that signed integer division and unsigned integer division are distinct operations; for unsigned integer division, use 'udiv'.
Division by zero leads to undefined behavior. Overflow also leads to @@ -2198,41 +2355,48 @@ by doing a 32-bit division of -2147483648 by -1.
Instruction+Syntax:
-<result> = fdiv <ty> <var1>, <var2> ; yields {ty}:result ++ <result> = fdiv <ty> <op1>, <op2> ; yields {ty}:resultOverview:
+The 'fdiv' instruction returns the quotient of its two operands.
+Arguments:
+The two arguments to the 'fdiv' instruction must be -floating point values. Both arguments must have -identical types. This instruction can also take vector -versions of floating point values.
+floating point or vector +of floating point values. Both arguments must have identical types. +Semantics:
+The value produced is the floating point quotient of the two operands.
+Example:
-<result> = fdiv float 4.0, %var ; yields {float}:result = 4.0 / %var + ++ <result> = fdiv float 4.0, %var ; yields {float}:result = 4.0 / %var- + +Syntax:
-<result> = urem <ty> <var1>, <var2> ; yields {ty}:result +<result> = urem <ty> <op1>, <op2> ; yields {ty}:resultOverview:
The 'urem' instruction returns the remainder from the unsigned division of its two arguments.
Arguments:
-The two arguments to the 'urem' instruction must be -integer values. Both arguments must have identical -types. This instruction can also take vector versions -of the values in which case the elements must be integers.
+The two arguments to the 'urem' instruction must be +integer or vector of integer +values. Both arguments must have identical types.
Semantics:
This instruction returns the unsigned integer remainder of a division. -This instruction always performs an unsigned division to get the remainder, -regardless of whether the arguments are unsigned or not.
+This instruction always performs an unsigned division to get the remainder.Note that unsigned integer remainder and signed integer remainder are distinct operations; for signed integer remainder, use 'srem'.
Taking the remainder of a division by zero leads to undefined behavior.
@@ -2242,26 +2406,36 @@ distinct operations; for signed integer remainder, use 'srem'.+- + +Syntax:
-<result> = srem <ty> <var1>, <var2> ; yields {ty}:result + ++ <result> = srem <ty> <op1>, <op2> ; yields {ty}:result+Overview:
+The 'srem' instruction returns the remainder from the signed division of its two operands. This instruction can also take vector versions of the values in which case the elements must be integers.
Arguments:
+The two arguments to the 'srem' instruction must be -integer values. Both arguments must have identical -types.
+integer or vector of integer +values. Both arguments must have identical types. +Semantics:
+This instruction returns the remainder of a division (where the result -has the same sign as the dividend, var1), not the modulo -operator (where the result has the same sign as the divisor, var2) of +has the same sign as the dividend, op1), not the modulo +operator (where the result has the same sign as the divisor, op2) of a value. For more information about the difference, see The Math Forum. For a table of how this is implemented in various languages, @@ -2281,24 +2455,31 @@ and the remainder.)
+@@ -2309,9 +2490,8 @@ OperationsSyntax:
-<result> = frem <ty> <var1>, <var2> ; yields {ty}:result +<result> = frem <ty> <op1>, <op2> ; yields {ty}:resultOverview:
The 'frem' instruction returns the remainder from the division of its two operands.
Arguments:
The two arguments to the 'frem' instruction must be -floating point values. Both arguments must have -identical types. This instruction can also take vector -versions of floating point values.
+floating point or vector +of floating point values. Both arguments must have identical types. +Semantics:
-This instruction returns the remainder of a division.
+ +This instruction returns the remainder of a division. +The remainder has the same sign as the dividend.
+Example:
-<result> = frem float 4.0, %var ; yields {float}:result = 4.0 % %var + ++ <result> = frem float 4.0, %var ; yields {float}:result = 4.0 % %varBitwise binary operators are used to do various forms of bit-twiddling in a program. They are generally very efficient instructions and can commonly be strength reduced from other -instructions. They require two operands, execute an operation on them, -and produce a single value. The resulting value of the bitwise binary -operators is always the same type as its first operand.
+instructions. They require two operands of the same type, execute an operation on them, +and produce a single value. The resulting value is the same type as its operands. @@ -2319,7 +2499,7 @@ operators is always the same type as its first operand. InstructionSyntax:
-<result> = shl <ty> <var1>, <var2> ; yields {ty}:result +<result> = shl <ty> <op1>, <op2> ; yields {ty}:resultOverview:
@@ -2330,13 +2510,14 @@ the left a specified number of bits.Arguments:
Both arguments to the 'shl' instruction must be the same integer type.
+ href="#t_integer">integer or vector of integer +type. 'op2' is treated as an unsigned value.Semantics:
-The value produced is var1 * 2var2. If -var2 is (statically or dynamically) equal to or larger than the number -of bits in var1, the result is undefined.
+The value produced is op1 * 2op2 mod 2n, +where n is the width of the result. If op2 is (statically or dynamically) negative or +equal to or larger than the number of bits in op1, the result is undefined.
Example:
<result> = shl i32 4, %var ; yields {i32}: 4 << %var @@ -2350,7 +2531,7 @@ of bits in var1, the result is undefined. InstructionSyntax:
-<result> = lshr <ty> <var1>, <var2> ; yields {ty}:result +<result> = lshr <ty> <op1>, <op2> ; yields {ty}:resultOverview:
@@ -2359,14 +2540,15 @@ operand shifted to the right a specified number of bits with zero fill.Arguments:
Both arguments to the 'lshr' instruction must be the same -integer type.
+integer or vector of integer +type. 'op2' is treated as an unsigned value.Semantics:
This instruction always performs a logical shift right operation. The most significant bits of the result will be filled with zero bits after the -shift. If var2 is (statically or dynamically) equal to or larger than -the number of bits in var1, the result is undefined.
+shift. If op2 is (statically or dynamically) equal to or larger than +the number of bits in op1, the result is undefined.Example:
@@ -2384,7 +2566,7 @@ InstructionSyntax:
-<result> = ashr <ty> <var1>, <var2> ; yields {ty}:result +<result> = ashr <ty> <op1>, <op2> ; yields {ty}:resultOverview:
@@ -2393,13 +2575,14 @@ operand shifted to the right a specified number of bits with sign extension.Arguments:
Both arguments to the 'ashr' instruction must be the same -integer type.
+integer or vector of integer +type. 'op2' is treated as an unsigned value.Semantics:
This instruction always performs an arithmetic shift right operation, The most significant bits of the result will be filled with the sign bit -of var1. If var2 is (statically or dynamically) equal to or -larger than the number of bits in var1, the result is undefined. +of op1. If op2 is (statically or dynamically) equal to or +larger than the number of bits in op1, the result is undefined.
Example:
@@ -2415,21 +2598,30 @@ larger than the number of bits in var1, the result is undefined. ++Syntax:
-<result> = and <ty> <var1>, <var2> ; yields {ty}:result + ++ <result> = and <ty> <op1>, <op2> ; yields {ty}:result+Overview:
+The 'and' instruction returns the bitwise logical and of its two operands.
+Arguments:
-The two arguments to the 'and' instruction must be integer values. Both arguments must have -identical types.
+ +The two arguments to the 'and' instruction must be +integer or vector of integer +values. Both arguments must have identical types.
+Semantics:
The truth table used for the 'and' instruction is:
-
+
@@ -2461,7 +2653,8 @@ identical types. Example:
-<result> = and i32 4, %var ; yields {i32}:result = 4 & %var ++ <result> = and i32 4, %var ; yields {i32}:result = 4 & %var <result> = and i32 15, 40 ; yields {i32}:result = 8 <result> = and i32 4, 8 ; yields {i32}:result = 0@@ -2470,19 +2663,20 @@ identical types.Syntax:
-<result> = or <ty> <var1>, <var2> ; yields {ty}:result +<result> = or <ty> <op1>, <op2> ; yields {ty}:resultOverview:
The 'or' instruction returns the bitwise logical inclusive or of its two operands.
Arguments:
-The two arguments to the 'or' instruction must be integer values. Both arguments must have -identical types.
+ +The two arguments to the 'or' instruction must be +integer or vector of integer +values. Both arguments must have identical types.
Semantics:
The truth table used for the 'or' instruction is:
-
+
@@ -2524,20 +2718,22 @@ identical types. Instruction Syntax:
-<result> = xor <ty> <var1>, <var2> ; yields {ty}:result +<result> = xor <ty> <op1>, <op2> ; yields {ty}:resultOverview:
The 'xor' instruction returns the bitwise logical exclusive or of its two operands. The xor is used to implement the "one's complement" operation, which is the "~" operator in C.
Arguments:
-The two arguments to the 'xor' instruction must be integer values. Both arguments must have -identical types.
+The two arguments to the 'xor' instruction must be +integer or vector of integer +values. Both arguments must have identical types.
+Semantics:
+The truth table used for the 'xor' instruction is:
-
+
@@ -2649,7 +2845,7 @@ results are undefined. Syntax:
- <result> = insertelement <n x <ty>> <val>, <ty> <elt>, i32 <idx> ; yields <n x <ty>> + <result> = insertelement <n x <ty>> <val>, <ty> <elt>, i32 <idx> ; yields <n x <ty>>Overview:
@@ -2740,6 +2936,114 @@ operand may be undef if performing a shuffle from only one vector. + + + ++ ++ + + + +LLVM supports several instructions for working with aggregate values. +
+ ++ ++ + + + + +Syntax:
+ ++ <result> = extractvalue <aggregate type> <val>, <idx>{, <idx>}* ++ +Overview:
+ ++The 'extractvalue' instruction extracts the value of a struct field +or array element from an aggregate value. +
+ + +Arguments:
+ ++The first operand of an 'extractvalue' instruction is a +value of struct or array +type. The operands are constant indices to specify which value to extract +in a similar manner as indices in a +'getelementptr' instruction. +
+ +Semantics:
+ ++The result is the value at the position in the aggregate specified by +the index operands. +
+ +Example:
+ ++ %result = extractvalue {i32, float} %agg, 0 ; yields i32 +++ ++ +Syntax:
+ ++ <result> = insertvalue <aggregate type> <val>, <ty> <val>, <idx> ; yields <n x <ty>> ++ +Overview:
+ ++The 'insertvalue' instruction inserts a value +into a struct field or array element in an aggregate. +
+ + +Arguments:
+ ++The first operand of an 'insertvalue' instruction is a +value of struct or array type. +The second operand is a first-class value to insert. +The following operands are constant indices +indicating the position at which to insert the value in a similar manner as +indices in a +'getelementptr' instruction. +The value to insert must have the same type as the value identified +by the indices. + +
Semantics:
+ ++The result is an aggregate of the same type as val. Its +value is that of val except that the value at the position +specified by the indices is that of elt. +
+ +Example:
+ ++ %result = insertvalue {i32, float} %agg, i32 1, 0 ; yields {i32, float} ++Memory Access and Addressing Operations @@ -2780,7 +3084,7 @@ address space (address space zero). bytes of memory from the operating system and returns a pointer of the appropriate type to the program. If "NumElements" is specified, it is the number of elements allocated, otherwise "NumElements" is defaulted to be one. -If an alignment is specified, the value result of the allocation is guaranteed to +If a constant alignment is specified, the value result of the allocation is guaranteed to be aligned to at least that boundary. If not specified, or if zero, the target can choose to align the allocation on any convenient boundary. @@ -2789,7 +3093,8 @@ choose to align the allocation on any convenient boundary.Semantics:
Memory is allocated using the system "malloc" function, and -a pointer is returned.
+a pointer is returned. The result of a zero byte allocattion is undefined. The +result is null if there is insufficient memory available.Example:
@@ -2831,7 +3136,8 @@ instruction.Semantics:
Access to the memory pointed to by the pointer is no longer defined -after this instruction executes.
+after this instruction executes. If the pointer is null, the operation +is a noop.Example:
@@ -2867,7 +3173,7 @@ space (address space zero). bytes of memory on the runtime stack, returning a pointer of the appropriate type to the program. If "NumElements" is specified, it is the number of elements allocated, otherwise "NumElements" is defaulted to be one. -If an alignment is specified, the value result of the allocation is guaranteed +If a constant alignment is specified, the value result of the allocation is guaranteed to be aligned to at least that boundary. If not specified, or if zero, the target can choose to align the allocation on any convenient boundary. @@ -2875,12 +3181,14 @@ can choose to align the allocation on any convenient boundary.Semantics:
-Memory is allocated; a pointer is returned. 'alloca'd +
Memory is allocated; a pointer is returned. The operation is undefiend if +there is insufficient stack space for the allocation. 'alloca'd memory is automatically released when the function returns. The 'alloca' instruction is commonly used to represent automatic variables that must have an address available. When the function returns (either with the ret or unwind -instructions), the memory is reclaimed.
+instructions), the memory is reclaimed. Allocating zero bytes +is legal, but the result is undefined.Example:
@@ -2909,7 +3217,7 @@ the number or order of execution of this load with other volatile load and store instructions.-The optional "align" argument specifies the alignment of the operation +The optional constant "align" argument specifies the alignment of the operation (that is, the alignment of the memory address). A value of 0 or an omitted "align" argument means that the operation has the preferential alignment for the target. It is the responsibility of the code emitter @@ -2940,13 +3248,14 @@ Instruction
Arguments:
There are two arguments to the 'store' instruction: a value to store and an address at which to store it. The type of the '<pointer>' -operand must be a pointer to the type of the '<value>' +operand must be a pointer to the first class type +of the '<value>' operand. If the store is marked as volatile, then the optimizer is not allowed to modify the number or order of execution of this store with other volatile load and store instructions.
-The optional "align" argument specifies the alignment of the operation +The optional constant "align" argument specifies the alignment of the operation (that is, the alignment of the memory address). A value of 0 or an omitted "align" argument means that the operation has the preferential alignment for the target. It is the responsibility of the code emitter @@ -2990,8 +3299,8 @@ provided depend on the type of the first pointer argument. The 'getelementptr' instruction is used to index down through the type levels of a structure or to a specific index in an array. When indexing into a structure, only i32 integer constants are allowed. When indexing -into an array or pointer, only integers of 32 or 64 bits are allowed, and will -be sign extended to 64-bit values.
+into an array or pointer, only integers of 32 or 64 bits are allowed; 32-bit +values will be sign extended to 64-bits if required.For example, let's consider a C code fragment and how it gets compiled to LLVM:
@@ -3036,8 +3345,8 @@ entry: on the pointer type that is being indexed into. Pointer and array types can use a 32-bit or 64-bit integer type but the value will always be sign extended -to 64-bits. Structure types require i32 -constants. +to 64-bits. Structure and packed +structure types require i32 constants.In the example above, the first index is indexing into the '%ST*' type, which is a pointer, yielding a '%ST' = '{ i32, double, %RT @@ -3066,7 +3375,7 @@ the LLVM code for the given testcase is equivalent to:
Note that it is undefined to access an array out of bounds: array and pointer indexes must always be within the defined bounds of the array type. -The one exception for this rules is zero length arrays. These arrays are +The one exception for this rule is zero length arrays. These arrays are defined to be accessible as variable length arrays, which requires access beyond the zero'th element.
@@ -3502,15 +3811,20 @@ nothing is done (no-op cast).Overview:
+The 'bitcast' instruction converts value to type ty2 without changing any bits.
Arguments:
+The 'bitcast' instruction takes a value to cast, which must be -a first class value, and a type to cast it to, which must also be a first class type. The bit sizes of value +a non-aggregate first class value, and a type to cast it to, which must also be +a non-aggregate first class type. The bit sizes of +value and the destination type, ty2, must be identical. If the source -type is a pointer, the destination type must also be a pointer.
+type is a pointer, the destination type must also be a pointer. This +instruction supports bitwise conversion of vectors to integers and to vectors +of other types (as long as they have the same size).Semantics:
The 'bitcast' instruction converts value to type @@ -3541,11 +3855,12 @@ instructions, which defy better classification.
Syntax:
-<result> = icmp <cond> <ty> <var1>, <var2> ; yields {i1}:result +<result> = icmp <cond> <ty> <op1>, <op2> ; yields {i1} or {<N x i1>}:resultOverview:
-The 'icmp' instruction returns a boolean value based on comparison -of its two integer operands.
+The 'icmp' instruction returns a boolean value or +a vector of boolean values based on comparison +of its two integer, integer vector, or pointer operands.
Arguments:
The 'icmp' instruction takes three operands. The first operand is the condition code indicating the kind of comparison to perform. It is not @@ -3563,11 +3878,13 @@ a value, just a keyword. The possible condition code are:
- sle: signed less or equal
The remaining two arguments must be integer or -pointer typed. They must also be identical types.
+pointer +or integer vector typed. +They must also be identical types.Semantics:
-The 'icmp' compares var1 and var2 according to +
The 'icmp' compares op1 and op2 according to the condition code given as cond. The comparison performed always -yields a i1 result, as follows: +yields either an i1 or vector of i1 result, as follows:
- eq: yields true if the operands are equal, false otherwise. No sign interpretation is necessary or performed. @@ -3575,24 +3892,29 @@ yields a i1 result, as follows:
- ne: yields true if the operands are unequal, false otherwise. No sign interpretation is necessary or performed.
- ugt: interprets the operands as unsigned values and yields - true if var1 is greater than var2.
+ true if op1 is greater than op2.- uge: interprets the operands as unsigned values and yields - true if var1 is greater than or equal to var2.
+ true if op1 is greater than or equal to op2.- ult: interprets the operands as unsigned values and yields - true if var1 is less than var2.
+ true if op1 is less than op2.- ule: interprets the operands as unsigned values and yields - true if var1 is less than or equal to var2.
+ true if op1 is less than or equal to op2.- sgt: interprets the operands as signed values and yields - true if var1 is greater than var2.
+ true if op1 is greater than op2.- sge: interprets the operands as signed values and yields - true if var1 is greater than or equal to var2.
+ true if op1 is greater than or equal to op2.- slt: interprets the operands as signed values and yields - true if var1 is less than var2.
+ true if op1 is less than op2.- sle: interprets the operands as signed values and yields - true if var1 is less than or equal to var2.
+ true if op1 is less than or equal to op2.If the operands are pointer typed, the pointer values are compared as if they were integers.
+If the operands are integer vectors, then they are compared +element by element. The result is an i1 vector with +the same number of elements as the values being compared. +Otherwise, the result is an i1. +
Example:
<result> = icmp eq i32 4, 5 ; yields: result=false @@ -3609,11 +3931,19 @@ values are compared as if they were integers.- + +Syntax:
-<result> = fcmp <cond> <ty> <var1>, <var2> ; yields {i1}:result +<result> = fcmp <cond> <ty> <op1>, <op2> ; yields {i1} or {<N x i1>}:resultOverview:
-The 'fcmp' instruction returns a boolean value based on comparison -of its floating point operands.
+The 'fcmp' instruction returns a boolean value +or vector of boolean values based on comparison +of its operands. +
+If the operands are floating point scalars, then the result +type is a boolean (i1). +
+If the operands are floating point vectors, then the result type +is a vector of boolean with the same number of elements as the +operands being compared.
Arguments:
The 'fcmp' instruction takes three operands. The first operand is the condition code indicating the kind of comparison to perform. It is not @@ -3638,77 +3968,195 @@ a value, just a keyword. The possible condition code are:
Ordered means that neither operand is a QNAN while unordered means that either operand may be a QNAN.
-The val1 and val2 arguments must be -floating point typed. They must have identical -types.
+Each of val1 and val2 arguments must be +either a floating point type +or a vector of floating point type. +They must have identical types.
Semantics:
-The 'fcmp' compares var1 and var2 according to -the condition code given as cond. The comparison performed always -yields a i1 result, as follows: +
The 'fcmp' instruction compares op1 and op2 +according to the condition code given as cond. +If the operands are vectors, then the vectors are compared +element by element. +Each comparison performed +always yields an i1 result, as follows:
- false: always yields false, regardless of operands.
- oeq: yields true if both operands are not a QNAN and - var1 is equal to var2.
+ op1 is equal to op2.- ogt: yields true if both operands are not a QNAN and - var1 is greather than var2.
+ op1 is greather than op2.- oge: yields true if both operands are not a QNAN and - var1 is greater than or equal to var2.
+ op1 is greater than or equal to op2.- olt: yields true if both operands are not a QNAN and - var1 is less than var2.
+ op1 is less than op2.- ole: yields true if both operands are not a QNAN and - var1 is less than or equal to var2.
+ op1 is less than or equal to op2.- one: yields true if both operands are not a QNAN and - var1 is not equal to var2.
+ op1 is not equal to op2.- ord: yields true if both operands are not a QNAN.
- ueq: yields true if either operand is a QNAN or - var1 is equal to var2.
+ op1 is equal to op2.- ugt: yields true if either operand is a QNAN or - var1 is greater than var2.
+ op1 is greater than op2.- uge: yields true if either operand is a QNAN or - var1 is greater than or equal to var2.
+ op1 is greater than or equal to op2.- ult: yields true if either operand is a QNAN or - var1 is less than var2.
+ op1 is less than op2.- ule: yields true if either operand is a QNAN or - var1 is less than or equal to var2.
+ op1 is less than or equal to op2.- une: yields true if either operand is a QNAN or - var1 is not equal to var2.
+ op1 is not equal to op2.- uno: yields true if either operand is a QNAN.
- true: always yields true, regardless of operands.
Example:
<result> = fcmp oeq float 4.0, 5.0 ; yields: result=false - <result> = icmp one float 4.0, 5.0 ; yields: result=true - <result> = icmp olt float 4.0, 5.0 ; yields: result=true - <result> = icmp ueq double 1.0, 2.0 ; yields: result=false + <result> = fcmp one float 4.0, 5.0 ; yields: result=true + <result> = fcmp olt float 4.0, 5.0 ; yields: result=true + <result> = fcmp ueq double 1.0, 2.0 ; yields: result=false++ + + +Syntax:
+<result> = vicmp <cond> <ty> <op1>, <op2> ; yields {ty}:result ++Overview:
+The 'vicmp' instruction returns an integer vector value based on +element-wise comparison of its two integer vector operands.
+Arguments:
+The 'vicmp' instruction takes three operands. The first operand is +the condition code indicating the kind of comparison to perform. It is not +a value, just a keyword. The possible condition code are: +
+
+- eq: equal
+- ne: not equal
+- ugt: unsigned greater than
+- uge: unsigned greater or equal
+- ult: unsigned less than
+- ule: unsigned less or equal
+- sgt: signed greater than
+- sge: signed greater or equal
+- slt: signed less than
+- sle: signed less or equal
+The remaining two arguments must be vector or +integer typed. They must also be identical types.
+Semantics:
+The 'vicmp' instruction compares op1 and op2 +according to the condition code given as cond. The comparison yields a +vector of integer result, of +identical type as the values being compared. The most significant bit in each +element is 1 if the element-wise comparison evaluates to true, and is 0 +otherwise. All other bits of the result are undefined. The condition codes +are evaluated identically to the 'icmp' +instruction. + +
Example:
++ <result> = vicmp eq <2 x i32> < i32 4, i32 0>, < i32 5, i32 0> ; yields: result=<2 x i32> < i32 0, i32 -1 > + <result> = vicmp ult <2 x i8 > < i8 1, i8 2>, < i8 2, i8 2 > ; yields: result=<2 x i8> < i8 -1, i8 0 > ++++ + + +Syntax:
+<result> = vfcmp <cond> <ty> <op1>, <op2>+Overview:
+The 'vfcmp' instruction returns an integer vector value based on +element-wise comparison of its two floating point vector operands. The output +elements have the same width as the input elements.
+Arguments:
+The 'vfcmp' instruction takes three operands. The first operand is +the condition code indicating the kind of comparison to perform. It is not +a value, just a keyword. The possible condition code are: +
+
+- false: no comparison, always returns false
+- oeq: ordered and equal
+- ogt: ordered and greater than
+- oge: ordered and greater than or equal
+- olt: ordered and less than
+- ole: ordered and less than or equal
+- one: ordered and not equal
+- ord: ordered (no nans)
+- ueq: unordered or equal
+- ugt: unordered or greater than
+- uge: unordered or greater than or equal
+- ult: unordered or less than
+- ule: unordered or less than or equal
+- une: unordered or not equal
+- uno: unordered (either nans)
+- true: no comparison, always returns true
+The remaining two arguments must be vector of +floating point typed. They must also be identical +types.
+Semantics:
+The 'vfcmp' instruction compares op1 and op2 +according to the condition code given as cond. The comparison yields a +vector of integer result, with +an identical number of elements as the values being compared, and each element +having identical with to the width of the floating point elements. The most +significant bit in each element is 1 if the element-wise comparison evaluates to +true, and is 0 otherwise. All other bits of the result are undefined. The +condition codes are evaluated identically to the +'fcmp' instruction. + +
Example:
++ <result> = vfcmp oeq <2 x float> < float 4, float 0 >, < float 5, float 0 > ; yields: result=<2 x i32> < i32 0, i32 -1 > + <result> = vfcmp ult <2 x double> < double 1, double 2 >, < double 2, double 2> ; yields: result=<2 x i64> < i64 -1, i64 0 > +++@@ -3721,7 +4169,9 @@ just prior to the current block.Syntax:
+<result> = phi <ty> [ <val0>, <label0>], ...Overview:
The 'phi' instruction is used to implement the φ node in the SSA graph representing the function.
Arguments:
+The type of the incoming values is specified with the first type field. After this, the 'phi' instruction takes a list of pairs as arguments, with one pair for each predecessor basic block of the current block. Only values of first class type may be used as the value arguments to the PHI node. Only labels may be used as the label arguments.
+There must be no non-phi instructions between the start of a basic block and the PHI instructions: i.e. PHI instructions must be first in a basic block.
+Semantics:
+At runtime, the 'phi' instruction logically takes on the value specified by the pair corresponding to the predecessor basic block that executed just prior to the current block.
+Example:
-Loop: ; Infinite loop that counts from 0 on up...+
%indvar = phi i32 [ 0, %LoopHeader ], [ %nextindvar, %Loop ]
%nextindvar = add i32 %indvar, 1
br label %Loop+Loop: ; Infinite loop that counts from 0 on up... + %indvar = phi i32 [ 0, %LoopHeader ], [ %nextindvar, %Loop ] + %nextindvar = add i32 %indvar, 1 + br label %Loop +Syntax:
- <result> = select i1 <cond>, <ty> <val1>, <ty> <val2> ; yields ty + <result> = select selty <cond>, <ty> <val1>, <ty> <val2> ; yields ty + + selty is either i1 or {<N x i1>}Overview:
@@ -3735,15 +4185,25 @@ condition, without branching.Arguments:
-The 'select' instruction requires a boolean value indicating the condition, and two values of the same first class type. +The 'select' instruction requires an 'i1' value or +a vector of 'i1' values indicating the +condition, and two values of the same first class +type. If the val1/val2 are vectors and +the condition is a scalar, then entire vectors are selected, not +individual elements.
Semantics:
-If the boolean condition evaluates to true, the instruction returns the first +If the condition is an i1 and it evaluates to 1, the instruction returns the first value argument; otherwise, it returns the second value argument.
++If the condition is a vector of i1, then the value arguments must +be vectors of the same size, and the selection is done element +by element. +
Example:
@@ -3910,9 +4370,10 @@ results.Arguments:
The 'getresult' instruction takes a call or invoke value as its -first argument. The value must have structure type. -The second argument is an unsigned index value which must be in range for -the number of values returned by the call.
+first argument, or an undef value. The value must have structure type. The second argument is a constant +unsigned index value which must be in range for the number of values returned +by the call.Semantics:
@@ -4136,7 +4597,8 @@ example, memory allocation.LLVM support for Accurate Garbage -Collection requires the implementation and generation of these intrinsics. +Collection (GC) requires the implementation and generation of these +intrinsics. These intrinsics allow identification of GC roots on the stack, as well as garbage collector implementations that require read and write barriers. @@ -4176,7 +4638,7 @@ value address) contains the meta-data to be associated with the root.
Semantics:
-At runtime, a call to this intrinsics stores a null pointer into the "ptrloc" +
At runtime, a call to this intrinsic stores a null pointer into the "ptrloc" location. At compile-time, the code generator generates information to allow the runtime to find the pointer at GC safe points. The 'llvm.gcroot' intrinsic may only be used in a function which specifies a GC @@ -4488,11 +4950,12 @@ performance.
The 'llvm.pcmarker' intrinsic is a method to export a Program Counter -(PC) in a region of -code to simulators and other tools. The method is target specific, but it is -expected that the marker will use exported symbols to transmit the PC of the marker. -The marker makes no guarantees that it will remain with any specific instruction -after optimizations. It is possible that the presence of a marker will inhibit +(PC) in a region of +code to simulators and other tools. The method is target specific, but it is +expected that the marker will use exported symbols to transmit the PC of the +marker. +The marker makes no guarantees that it will remain with any specific instruction +after optimizations. It is possible that the presence of a marker will inhibit optimizations. The intended use is to be inserted after optimizations to allow correlations of simulation runs.
@@ -5312,7 +5775,8 @@ declare i8* @llvm.init.trampoline(i8* <tramp>, i8* <func>, i8* <n These intrinsic functions expand the "universal IR" of LLVM to represent hardware constructs for atomic operations and memory synchronization. This provides an interface to the hardware, not an interface to the programmer. It - is aimed at a low enough level to allow any programming models or APIs which + is aimed at a low enough level to allow any programming models or APIs + (Application Programming Interfaces) which need atomic behaviors to map cleanly onto it. It is also modeled primarily on hardware behavior. Just as hardware provides a "universal IR" for source languages, it also provides a starting point for developing a "universal" @@ -5404,19 +5868,20 @@ i1 <device> )Syntax:
- This is an overloaded intrinsic. You can use llvm.atomic.lcs on any - integer bit width. Not all targets support all bit widths however.
+ This is an overloaded intrinsic. You can use llvm.atomic.cmp.swap on + any integer bit width and for different address spaces. Not all targets + support all bit widths however.-declare i8 @llvm.atomic.lcs.i8( i8* <ptr>, i8 <cmp>, i8 <val> ) -declare i16 @llvm.atomic.lcs.i16( i16* <ptr>, i16 <cmp>, i16 <val> ) -declare i32 @llvm.atomic.lcs.i32( i32* <ptr>, i32 <cmp>, i32 <val> ) -declare i64 @llvm.atomic.lcs.i64( i64* <ptr>, i64 <cmp>, i64 <val> ) +declare i8 @llvm.atomic.cmp.swap.i8.p0i8( i8* <ptr>, i8 <cmp>, i8 <val> ) +declare i16 @llvm.atomic.cmp.swap.i16.p0i16( i16* <ptr>, i16 <cmp>, i16 <val> ) +declare i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* <ptr>, i32 <cmp>, i32 <val> ) +declare i64 @llvm.atomic.cmp.swap.i64.p0i64( i64* <ptr>, i64 <cmp>, i64 <val> )Overview:
@@ -5426,7 +5891,7 @@ declare i64 @llvm.atomic.lcs.i64( i64* <ptr>, i64 <cmp>, i64 <valArguments:
- The llvm.atomic.lcs intrinsic takes three arguments. The result as + The llvm.atomic.cmp.swap intrinsic takes three arguments. The result as well as both cmp and val must be integer values with the same bit width. The ptr argument must be a pointer to a value of this integer type. While any bit width integer may be used, targets may only @@ -5448,13 +5913,13 @@ declare i64 @llvm.atomic.lcs.i64( i64* <ptr>, i64 <cmp>, i64 <val store i32 4, %ptr %val1 = add i32 4, 4 -%result1 = call i32 @llvm.atomic.lcs.i32( i32* %ptr, i32 4, %val1 ) +%result1 = call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %ptr, i32 4, %val1 ) ; yields {i32}:result1 = 4 %stored1 = icmp eq i32 %result1, 4 ; yields {i1}:stored1 = true %memval1 = load i32* %ptr ; yields {i32}:memval1 = 8 %val2 = add i32 1, 1 -%result2 = call i32 @llvm.atomic.lcs.i32( i32* %ptr, i32 5, %val2 ) +%result2 = call i32 @llvm.atomic.cmp.swap.i32.p0i32( i32* %ptr, i32 5, %val2 ) ; yields {i32}:result2 = 8 %stored2 = icmp eq i32 %result2, 5 ; yields {i1}:stored2 = false @@ -5473,10 +5938,10 @@ declare i64 @llvm.atomic.lcs.i64( i64* <ptr>, i64 <cmp>, i64 <val This is an overloaded intrinsic. You can use llvm.atomic.swap on any integer bit width. Not all targets support all bit widths however.
-declare i8 @llvm.atomic.swap.i8( i8* <ptr>, i8 <val> ) -declare i16 @llvm.atomic.swap.i16( i16* <ptr>, i16 <val> ) -declare i32 @llvm.atomic.swap.i32( i32* <ptr>, i32 <val> ) -declare i64 @llvm.atomic.swap.i64( i64* <ptr>, i64 <val> ) +declare i8 @llvm.atomic.swap.i8.p0i8( i8* <ptr>, i8 <val> ) +declare i16 @llvm.atomic.swap.i16.p0i16( i16* <ptr>, i16 <val> ) +declare i32 @llvm.atomic.swap.i32.p0i32( i32* <ptr>, i32 <val> ) +declare i64 @llvm.atomic.swap.i64.p0i64( i64* <ptr>, i64 <val> )Overview:
@@ -5488,7 +5953,7 @@ declare i64 @llvm.atomic.swap.i64( i64* <ptr>, i64 <val> )Arguments:
- The llvm.atomic.ls intrinsic takes two arguments. Both the + The llvm.atomic.swap intrinsic takes two arguments. Both the val argument and the result must be integers of the same bit width. The first argument, ptr, must be a pointer to a value of this integer type. The targets may only lower integer representations they @@ -5507,13 +5972,13 @@ declare i64 @llvm.atomic.swap.i64( i64* <ptr>, i64 <val> ) store i32 4, %ptr %val1 = add i32 4, 4 -%result1 = call i32 @llvm.atomic.swap.i32( i32* %ptr, i32 %val1 ) +%result1 = call i32 @llvm.atomic.swap.i32.p0i32( i32* %ptr, i32 %val1 ) ; yields {i32}:result1 = 4 %stored1 = icmp eq i32 %result1, 4 ; yields {i1}:stored1 = true %memval1 = load i32* %ptr ; yields {i32}:memval1 = 8 %val2 = add i32 1, 1 -%result2 = call i32 @llvm.atomic.swap.i32( i32* %ptr, i32 %val2 ) +%result2 = call i32 @llvm.atomic.swap.i32.p0i32( i32* %ptr, i32 %val2 ) ; yields {i32}:result2 = 8 %stored2 = icmp eq i32 %result2, 8 ; yields {i1}:stored2 = true @@ -5523,19 +5988,19 @@ declare i64 @llvm.atomic.swap.i64( i64* <ptr>, i64 <val> )
+ + + +Syntax:
- This is an overloaded intrinsic. You can use llvm.atomic.las on any + This is an overloaded intrinsic. You can use llvm.atomic.load.add on any integer bit width. Not all targets support all bit widths however.
-declare i8 @llvm.atomic.las.i8.( i8* <ptr>, i8 <delta> ) -declare i16 @llvm.atomic.las.i16.( i16* <ptr>, i16 <delta> ) -declare i32 @llvm.atomic.las.i32.( i32* <ptr>, i32 <delta> ) -declare i64 @llvm.atomic.las.i64.( i64* <ptr>, i64 <delta> ) +declare i8 @llvm.atomic.load.add.i8..p0i8( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.add.i16..p0i16( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.add.i32..p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.add.i64..p0i64( i64* <ptr>, i64 <delta> )Overview:
@@ -5562,17 +6027,238 @@ declare i64 @llvm.atomic.las.i64.( i64* <ptr>, i64 <delta> )%ptr = malloc i32 store i32 4, %ptr -%result1 = call i32 @llvm.atomic.las.i32( i32* %ptr, i32 4 ) +%result1 = call i32 @llvm.atomic.load.add.i32.p0i32( i32* %ptr, i32 4 ) ; yields {i32}:result1 = 4 -%result2 = call i32 @llvm.atomic.las.i32( i32* %ptr, i32 2 ) +%result2 = call i32 @llvm.atomic.load.add.i32.p0i32( i32* %ptr, i32 2 ) ; yields {i32}:result2 = 8 -%result3 = call i32 @llvm.atomic.las.i32( i32* %ptr, i32 5 ) +%result3 = call i32 @llvm.atomic.load.add.i32.p0i32( i32* %ptr, i32 5 ) ; yields {i32}:result3 = 10 -%memval = load i32* %ptr ; yields {i32}:memval1 = 15 +%memval1 = load i32* %ptr ; yields {i32}:memval1 = 15 ++++ + +Syntax:
++ This is an overloaded intrinsic. You can use llvm.atomic.load.sub on + any integer bit width and for different address spaces. Not all targets + support all bit widths however.
++declare i8 @llvm.atomic.load.sub.i8.p0i32( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.sub.i16.p0i32( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.sub.i32.p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.sub.i64.p0i32( i64* <ptr>, i64 <delta> ) + ++Overview:
++ This intrinsic subtracts delta to the value stored in memory at + ptr. It yields the original value at ptr. +
+Arguments:
++ + The intrinsic takes two arguments, the first a pointer to an integer value + and the second an integer value. The result is also an integer value. These + integer types can have any bit width, but they must all have the same bit + width. The targets may only lower integer representations they support. +
+Semantics:
++ This intrinsic does a series of operations atomically. It first loads the + value stored at ptr. It then subtracts delta, stores the + result to ptr. It yields the original value stored at ptr. +
+ +Examples:
++%ptr = malloc i32 + store i32 8, %ptr +%result1 = call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %ptr, i32 4 ) + ; yields {i32}:result1 = 8 +%result2 = call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %ptr, i32 2 ) + ; yields {i32}:result2 = 4 +%result3 = call i32 @llvm.atomic.load.sub.i32.p0i32( i32* %ptr, i32 5 ) + ; yields {i32}:result3 = 2 +%memval1 = load i32* %ptr ; yields {i32}:memval1 = -3 +++ 'llvm.atomic.load.and.*' Intrinsic+
+ 'llvm.atomic.load.nand.*' Intrinsic
+ 'llvm.atomic.load.or.*' Intrinsic
+ 'llvm.atomic.load.xor.*' Intrinsic
+ +++ +Syntax:
++ These are overloaded intrinsics. You can use llvm.atomic.load_and, + llvm.atomic.load_nand, llvm.atomic.load_or, and + llvm.atomic.load_xor on any integer bit width and for different + address spaces. Not all targets support all bit widths however.
++declare i8 @llvm.atomic.load.and.i8.p0i8( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.and.i16.p0i16( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.and.i32.p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.and.i64.p0i64( i64* <ptr>, i64 <delta> ) + ++ ++declare i8 @llvm.atomic.load.or.i8.p0i8( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.or.i16.p0i16( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.or.i32.p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.or.i64.p0i64( i64* <ptr>, i64 <delta> ) + ++ ++declare i8 @llvm.atomic.load.nand.i8.p0i32( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.nand.i16.p0i32( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.nand.i32.p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.nand.i64.p0i32( i64* <ptr>, i64 <delta> ) + ++ ++declare i8 @llvm.atomic.load.xor.i8.p0i32( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.xor.i16.p0i32( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.xor.i32.p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.xor.i64.p0i32( i64* <ptr>, i64 <delta> ) + ++Overview:
++ These intrinsics bitwise the operation (and, nand, or, xor) delta to + the value stored in memory at ptr. It yields the original value + at ptr. +
+Arguments:
++ + These intrinsics take two arguments, the first a pointer to an integer value + and the second an integer value. The result is also an integer value. These + integer types can have any bit width, but they must all have the same bit + width. The targets may only lower integer representations they support. +
+Semantics:
++ These intrinsics does a series of operations atomically. They first load the + value stored at ptr. They then do the bitwise operation + delta, store the result to ptr. They yield the original + value stored at ptr. +
+ +Examples:
++%ptr = malloc i32 + store i32 0x0F0F, %ptr +%result0 = call i32 @llvm.atomic.load.nand.i32.p0i32( i32* %ptr, i32 0xFF ) + ; yields {i32}:result0 = 0x0F0F +%result1 = call i32 @llvm.atomic.load.and.i32.p0i32( i32* %ptr, i32 0xFF ) + ; yields {i32}:result1 = 0xFFFFFFF0 +%result2 = call i32 @llvm.atomic.load.or.i32.p0i32( i32* %ptr, i32 0F ) + ; yields {i32}:result2 = 0xF0 +%result3 = call i32 @llvm.atomic.load.xor.i32.p0i32( i32* %ptr, i32 0F ) + ; yields {i32}:result3 = FF +%memval1 = load i32* %ptr ; yields {i32}:memval1 = F0+ 'llvm.atomic.load.max.*' Intrinsic+
+ 'llvm.atomic.load.min.*' Intrinsic
+ 'llvm.atomic.load.umax.*' Intrinsic
+ 'llvm.atomic.load.umin.*' Intrinsic
+ +++Syntax:
++ These are overloaded intrinsics. You can use llvm.atomic.load_max, + llvm.atomic.load_min, llvm.atomic.load_umax, and + llvm.atomic.load_umin on any integer bit width and for different + address spaces. Not all targets + support all bit widths however.
++declare i8 @llvm.atomic.load.max.i8.p0i8( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.max.i16.p0i16( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.max.i32.p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.max.i64.p0i64( i64* <ptr>, i64 <delta> ) + ++ ++declare i8 @llvm.atomic.load.min.i8.p0i8( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.min.i16.p0i16( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.min.i32..p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.min.i64..p0i64( i64* <ptr>, i64 <delta> ) + ++ ++declare i8 @llvm.atomic.load.umax.i8.p0i8( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.umax.i16.p0i16( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.umax.i32.p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.umax.i64.p0i64( i64* <ptr>, i64 <delta> ) + ++ ++declare i8 @llvm.atomic.load.umin.i8..p0i8( i8* <ptr>, i8 <delta> ) +declare i16 @llvm.atomic.load.umin.i16.p0i16( i16* <ptr>, i16 <delta> ) +declare i32 @llvm.atomic.load.umin.i32..p0i32( i32* <ptr>, i32 <delta> ) +declare i64 @llvm.atomic.load.umin.i64..p0i64( i64* <ptr>, i64 <delta> ) + ++Overview:
++ These intrinsics takes the signed or unsigned minimum or maximum of + delta and the value stored in memory at ptr. It yields the + original value at ptr. +
+Arguments:
++ + These intrinsics take two arguments, the first a pointer to an integer value + and the second an integer value. The result is also an integer value. These + integer types can have any bit width, but they must all have the same bit + width. The targets may only lower integer representations they support. +
+Semantics:
++ These intrinsics does a series of operations atomically. They first load the + value stored at ptr. They then do the signed or unsigned min or max + delta and the value, store the result to ptr. They yield + the original value stored at ptr. +
+ +Examples:
++%ptr = malloc i32 + store i32 7, %ptr +%result0 = call i32 @llvm.atomic.load.min.i32.p0i32( i32* %ptr, i32 -2 ) + ; yields {i32}:result0 = 7 +%result1 = call i32 @llvm.atomic.load.max.i32.p0i32( i32* %ptr, i32 8 ) + ; yields {i32}:result1 = -2 +%result2 = call i32 @llvm.atomic.load.umin.i32.p0i32( i32* %ptr, i32 10 ) + ; yields {i32}:result2 = 8 +%result3 = call i32 @llvm.atomic.load.umax.i32.p0i32( i32* %ptr, i32 30 ) + ; yields {i32}:result3 = 8 +%memval1 = load i32* %ptr ; yields {i32}:memval1 = 30 ++