-
In general, you want to follow the format of X86 or PowerPC (in
-lib/Target).
+
In general, you want to follow the format of SPARC, X86 or PowerPC (in
+lib/Target). SPARC is the simplest backend, and is RISC, so if
+you're working on a RISC target, it is a good one to start with.
To create a static compiler (one that emits text assembly), you need to
implement the following:
-- Describe the register set
+
- Describe the register set.
- Create a TableGen description of
the register set and register classes
- Implement a subclass of MRegisterInfo
+ href="CodeGenerator.html#targetregisterinfo">TargetRegisterInfo
-
Describe the instruction set
+Describe the instruction set.
-
Describe the target machine
+Describe the target machine.
- Create a TableGen description of
the target that describes the pointer size and references the instruction
@@ -104,36 +105,37 @@ RegisterTarget<MyTargetMachine> M("short_name", " Target name");
is the description of your target to appear in -help
listing.
-
Implement the assembly printer for the architecture. Usually, if you have
-described the instruction set with the assembly printer generator in mind, that
-step can be almost automated.
-
-
-
You also need to write an instruction selector for your platform. The
-recommended method is the pattern-matching instruction selector. You can see
-examples in other targets: lib/Target/*/*ISelPattern.cpp. The former
-method for writing instruction selectors (not recommended) is
-encapsulated in lib/Target/*/*ISelSimple.cpp, which are
-InstVisitor-based translators, generating code for an LLVM instruction
-at a time. Creating an instruction selector is perhaps the most time-consuming
-part of creating a back-end.
-
-
To create a JIT for your platform:
-
+
Implement the assembly printer for the architecture.
+
+ - Define all of the assembly strings for your target, adding them to the
+ instructions in your *InstrInfo.td file.
+ - Implement the llvm::AsmPrinter interface.
+
+
+
Implement an instruction selector for the architecture.
+
+ - The recommended method is the
+ pattern-matching DAG-to-DAG instruction selector (for example, see
+ the PowerPC backend in PPCISelDAGtoDAG.cpp). Parts of instruction
+ selector creation can be performed by adding patterns to the instructions
+ in your .td file.
+
+
+
Optionally, add subtarget support.
-- Create a subclass of TargetJITInfo
-- Create a machine code emitter that will be used to emit binary code
- directly into memory, given MachineInstrs
+ - If your target has multiple subtargets (e.g. variants with different
+ capabilities), implement the llvm::TargetSubtarget interface
+ for your architecture. This allows you to add -mcpu= and
+ -mattr= options.
+
+Optionally, add JIT support.
+
+ - Create a subclass of TargetJITInfo
+ - Create a machine code emitter that will be used to emit binary code
+ directly into memory, given MachineInstrs
+
-
-Note that lib/target/Skeleton is a clean skeleton for a new target,
-so you might want to start with that and adapt it for your target, and if you
-are wondering how things are done, peek in the X86 or PowerPC target.
-
-The Skeleton target is non-functional but provides the basic building blocks
-you will need for your endeavor.
-