X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=include%2Fllvm%2FCodeGen%2FLiveStackAnalysis.h;h=a3b1855bbca6918aec6cb79e3bc35d68938dc590;hb=b09c146b116359616f6cbd4c8b3328607e00ff42;hp=ad984db1899e14e075286425e418e5fe63989486;hpb=90c579de5a383cee278acc3f7e7b9d0a656e6a35;p=oota-llvm.git diff --git a/include/llvm/CodeGen/LiveStackAnalysis.h b/include/llvm/CodeGen/LiveStackAnalysis.h index ad984db1899..a3b1855bbca 100644 --- a/include/llvm/CodeGen/LiveStackAnalysis.h +++ b/include/llvm/CodeGen/LiveStackAnalysis.h @@ -16,15 +16,17 @@ #ifndef LLVM_CODEGEN_LIVESTACK_ANALYSIS_H #define LLVM_CODEGEN_LIVESTACK_ANALYSIS_H -#include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/LiveInterval.h" -#include "llvm/Target/TargetRegisterInfo.h" +#include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/Support/Allocator.h" +#include "llvm/Target/TargetRegisterInfo.h" #include namespace llvm { class LiveStacks : public MachineFunctionPass { + const TargetRegisterInfo *TRI; + /// Special pool allocator for VNInfo's (LiveInterval val#). /// VNInfo::Allocator VNInfoAllocator; @@ -39,7 +41,9 @@ namespace llvm { public: static char ID; // Pass identification, replacement for typeid - LiveStacks() : MachineFunctionPass(ID) {} + LiveStacks() : MachineFunctionPass(ID) { + initializeLiveStacksPass(*PassRegistry::getPassRegistry()); + } typedef SS2IntervalMap::iterator iterator; typedef SS2IntervalMap::const_iterator const_iterator; @@ -50,19 +54,7 @@ namespace llvm { unsigned getNumIntervals() const { return (unsigned)S2IMap.size(); } - LiveInterval &getOrCreateInterval(int Slot, const TargetRegisterClass *RC) { - assert(Slot >= 0 && "Spill slot indice must be >= 0"); - SS2IntervalMap::iterator I = S2IMap.find(Slot); - if (I == S2IMap.end()) { - I = S2IMap.insert(I,std::make_pair(Slot, LiveInterval(Slot,0.0F,true))); - S2RCMap.insert(std::make_pair(Slot, RC)); - } else { - // Use the largest common subclass register class. - const TargetRegisterClass *OldRC = S2RCMap[Slot]; - S2RCMap[Slot] = getCommonSubClass(OldRC, RC); - } - return I->second; - } + LiveInterval &getOrCreateInterval(int Slot, const TargetRegisterClass *RC); LiveInterval &getInterval(int Slot) { assert(Slot >= 0 && "Spill slot indice must be >= 0");