X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=include%2Fllvm%2FCodeGen%2FLiveVariables.h;h=ebbe610ed0140792e298fb1acfe3935021f63a38;hb=c651e4c51e11feb58e6c12fee8a8f85631269f2f;hp=3debf347fc8c63321d5466fe1c3a9b6d6dd204dd;hpb=e0cbf970ac5e9636a3a635e1f3390aa5d93c827a;p=oota-llvm.git diff --git a/include/llvm/CodeGen/LiveVariables.h b/include/llvm/CodeGen/LiveVariables.h index 3debf347fc8..ebbe610ed01 100644 --- a/include/llvm/CodeGen/LiveVariables.h +++ b/include/llvm/CodeGen/LiveVariables.h @@ -30,6 +30,8 @@ #define LLVM_CODEGEN_LIVEVARIABLES_H #include "llvm/CodeGen/MachineFunctionPass.h" +#include "llvm/ADT/BitVector.h" +#include "llvm/ADT/SmallVector.h" #include namespace llvm { @@ -38,6 +40,34 @@ class MRegisterInfo; class LiveVariables : public MachineFunctionPass { public: + /// VarInfo - This represents the regions where a virtual register is live in + /// the program. We represent this with three different pieces of + /// information: the instruction that uniquely defines the value, the set of + /// blocks the instruction is live into and live out of, and the set of + /// non-phi instructions that are the last users of the value. + /// + /// In the common case where a value is defined and killed in the same block, + /// DefInst is the defining inst, there is one killing instruction, and + /// AliveBlocks is empty. + /// + /// Otherwise, the value is live out of the block. If the value is live + /// across any blocks, these blocks are listed in AliveBlocks. Blocks where + /// the liveness range ends are not included in AliveBlocks, instead being + /// captured by the Kills set. In these blocks, the value is live into the + /// block (unless the value is defined and killed in the same block) and lives + /// until the specified instruction. Note that there cannot ever be a value + /// whose Kills set contains two instructions from the same basic block. + /// + /// PHI nodes complicate things a bit. If a PHI node is the last user of a + /// value in one of its predecessor blocks, it is not listed in the kills set, + /// but does include the predecessor block in the AliveBlocks set (unless that + /// block also defines the value). This leads to the (perfectly sensical) + /// situation where a value is defined in a block, and the last use is a phi + /// node in the successor. In this case, DefInst will be the defining + /// instruction, AliveBlocks is empty (the value is not live across any + /// blocks) and Kills is empty (phi nodes are not included). This is sensical + /// because the value must be live to the end of the block, but is not live in + /// any successor blocks. struct VarInfo { /// DefInst - The machine instruction that defines this register. /// @@ -47,14 +77,18 @@ public: /// through. This is a bit set which uses the basic block number as an /// index. /// - std::vector AliveBlocks; + BitVector AliveBlocks; + + /// NumUses - Number of uses of this register across the entire function. + /// + unsigned NumUses; /// Kills - List of MachineInstruction's which are the last use of this /// virtual register (kill it) in their basic block. /// std::vector Kills; - VarInfo() : DefInst(0) {} + VarInfo() : DefInst(0), NumUses(0) {} /// removeKill - Delete a kill corresponding to the specified /// machine instruction. Returns true if there was a kill @@ -68,6 +102,8 @@ public: } return false; } + + void dump() const; }; private: @@ -77,108 +113,77 @@ private: /// std::vector VirtRegInfo; - /// RegistersKilled - This map keeps track of all of the registers that - /// are dead immediately after an instruction reads its operands. If an - /// instruction does not have an entry in this map, it kills no registers. + /// ReservedRegisters - This vector keeps track of which registers + /// are reserved register which are not allocatable by the target machine. + /// We can not track liveness for values that are in this set. /// - std::map > RegistersKilled; - - /// RegistersDead - This map keeps track of all of the registers that are - /// dead immediately after an instruction executes, which are not dead after - /// the operands are evaluated. In practice, this only contains registers - /// which are defined by an instruction, but never used. - /// - std::map > RegistersDead; - - /// Dummy - An always empty vector used for instructions without dead or - /// killed operands. - std::vector Dummy; - - /// AllocatablePhysicalRegisters - This vector keeps track of which registers - /// are actually register allocatable by the target machine. We can not track - /// liveness for values that are not in this set. - /// - std::vector AllocatablePhysicalRegisters; + BitVector ReservedRegisters; private: // Intermediate data structures + MachineFunction *MF; + const MRegisterInfo *RegInfo; + // PhysRegInfo - Keep track of which instruction was the last def/use of a + // physical register. This is a purely local property, because all physical + // register references as presumed dead across basic blocks. MachineInstr **PhysRegInfo; + + // PhysRegUsed - Keep track whether the physical register has been used after + // its last definition. This is local property. bool *PhysRegUsed; + // PhysRegPartUse - Keep track of which instruction was the last partial use + // of a physical register (e.g. on X86 a def of EAX followed by a use of AX). + // This is a purely local property. + MachineInstr **PhysRegPartUse; + + // PhysRegPartDef - Keep track of a list of instructions which "partially" + // defined the physical register (e.g. on X86 AX partially defines EAX). + // These are turned into use/mod/write if there is a use of the register + // later in the same block. This is local property. + SmallVector *PhysRegPartDef; + + SmallVector *PHIVarInfo; + + /// addRegisterKilled - We have determined MI kills a register. Look for the + /// operand that uses it and mark it as IsKill. If AddIfNotFound is true, + /// add a implicit operand if it's not found. Returns true if the operand + /// exists / is added. + bool addRegisterKilled(unsigned IncomingReg, MachineInstr *MI, + bool AddIfNotFound = false); + + /// addRegisterDead - We have determined MI defined a register without a use. + /// Look for the operand that defines it and mark it as IsDead. If + /// AddIfNotFound is true, add a implicit operand if it's not found. Returns + /// true if the operand exists / is added. + bool addRegisterDead(unsigned IncomingReg, MachineInstr *MI, + bool AddIfNotFound = false); + void HandlePhysRegUse(unsigned Reg, MachineInstr *MI); void HandlePhysRegDef(unsigned Reg, MachineInstr *MI); + /// analyzePHINodes - Gather information about the PHI nodes in here. In + /// particular, we want to map the variable information of a virtual + /// register which is used in a PHI node. We map that to the BB the vreg + /// is coming from. + void analyzePHINodes(const MachineFunction& Fn); public: virtual bool runOnMachineFunction(MachineFunction &MF); - /// killed_iterator - Iterate over registers killed by a machine instruction - /// - typedef std::vector::iterator killed_iterator; - - std::vector &getKillsVector(MachineInstr *MI) { - std::map >::iterator I = - RegistersKilled.find(MI); - return I != RegistersKilled.end() ? I->second : Dummy; - } - std::vector &getDeadDefsVector(MachineInstr *MI) { - std::map >::iterator I = - RegistersDead.find(MI); - return I != RegistersDead.end() ? I->second : Dummy; - } - - - /// killed_begin/end - Get access to the range of registers killed by a - /// machine instruction. - killed_iterator killed_begin(MachineInstr *MI) { - return getKillsVector(MI).begin(); - } - killed_iterator killed_end(MachineInstr *MI) { - return getKillsVector(MI).end(); - } - std::pair - killed_range(MachineInstr *MI) { - std::vector &V = getKillsVector(MI); - return std::make_pair(V.begin(), V.end()); - } - /// KillsRegister - Return true if the specified instruction kills the /// specified register. - bool KillsRegister(MachineInstr *MI, unsigned Reg) const { - std::map >::const_iterator I = - RegistersKilled.find(MI); - if (I != RegistersKilled.end()) - for (std::vector::const_iterator CI = I->second.begin(), - E = I->second.end(); CI != E; ++CI) - if (*CI == Reg) return true; - return false; - } - - killed_iterator dead_begin(MachineInstr *MI) { - return getDeadDefsVector(MI).begin(); - } - killed_iterator dead_end(MachineInstr *MI) { - return getDeadDefsVector(MI).end(); - } - std::pair - dead_range(MachineInstr *MI) { - std::vector &V = getDeadDefsVector(MI); - return std::make_pair(V.begin(), V.end()); - } + bool KillsRegister(MachineInstr *MI, unsigned Reg) const; /// RegisterDefIsDead - Return true if the specified instruction defines the /// specified register, but that definition is dead. - bool RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const { - std::map >::const_iterator I = - RegistersDead.find(MI); - if (I != RegistersDead.end()) - for (std::vector::const_iterator CI = I->second.begin(), - E = I->second.end(); CI != E; ++CI) - if (*CI == Reg) return true; - return false; - } + bool RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const; + /// ModifiesRegister - Return true if the specified instruction modifies the + /// specified register. + bool ModifiesRegister(MachineInstr *MI, unsigned Reg) const; + //===--------------------------------------------------------------------===// // API to update live variable information @@ -190,12 +195,13 @@ public: /// addVirtualRegisterKilled - Add information about the fact that the /// specified register is killed after being used by the specified - /// instruction. - /// - void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI) { - RegistersKilled.insert(std::make_pair(MI, IncomingReg)); - getVarInfo(IncomingReg).Kills.push_back(MI); - } + /// instruction. If AddIfNotFound is true, add a implicit operand if it's + /// not found. + void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI, + bool AddIfNotFound = false) { + if (addRegisterKilled(IncomingReg, MI, AddIfNotFound)) + getVarInfo(IncomingReg).Kills.push_back(MI); + } /// removeVirtualRegisterKilled - Remove the specified virtual /// register from the live variable information. Returns true if the @@ -207,27 +213,31 @@ public: if (!getVarInfo(reg).removeKill(MI)) return false; - std::vector &V = getKillsVector(MI); - for (unsigned i = 0, e = V.size(); i != e; ++i) - if (V[i] == reg) { - V.erase(V.begin()+i); - return true; + bool Removed = false; + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + MachineOperand &MO = MI->getOperand(i); + if (MO.isReg() && MO.isUse() && MO.getReg() == reg) { + MO.unsetIsKill(); + Removed = true; + break; } + } + + assert(Removed && "Register is not used by this instruction!"); return true; } /// removeVirtualRegistersKilled - Remove all killed info for the specified /// instruction. - void removeVirtualRegistersKilled(MachineInstr *MI) { - RegistersKilled.erase(MI); - } - + void removeVirtualRegistersKilled(MachineInstr *MI); + /// addVirtualRegisterDead - Add information about the fact that the specified - /// register is dead after being used by the specified instruction. - /// - void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI) { - RegistersDead.insert(std::make_pair(MI, IncomingReg)); - getVarInfo(IncomingReg).Kills.push_back(MI); + /// register is dead after being used by the specified instruction. If + /// AddIfNotFound is true, add a implicit operand if it's not found. + void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI, + bool AddIfNotFound = false) { + if (addRegisterDead(IncomingReg, MI, AddIfNotFound)) + getVarInfo(IncomingReg).Kills.push_back(MI); } /// removeVirtualRegisterDead - Remove the specified virtual @@ -240,29 +250,29 @@ public: if (!getVarInfo(reg).removeKill(MI)) return false; - std::vector &V = getDeadDefsVector(MI); - for (unsigned i = 0, e = V.size(); i != e; ++i) - if (V[i] == reg) { - V.erase(V.begin()+i); - return true; + bool Removed = false; + for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { + MachineOperand &MO = MI->getOperand(i); + if (MO.isReg() && MO.isDef() && MO.getReg() == reg) { + MO.unsetIsDead(); + Removed = true; + break; } + } + assert(Removed && "Register is not defined by this instruction!"); return true; } - /// removeVirtualRegistersDead - Remove all of the specified dead - /// registers from the live variable information. - void removeVirtualRegistersDead(MachineInstr *MI) { - RegistersDead.erase(MI); - } - + /// removeVirtualRegistersDead - Remove all of the dead registers for the + /// specified instruction from the live variable information. + void removeVirtualRegistersDead(MachineInstr *MI); + virtual void getAnalysisUsage(AnalysisUsage &AU) const { AU.setPreservesAll(); } virtual void releaseMemory() { VirtRegInfo.clear(); - RegistersKilled.clear(); - RegistersDead.clear(); } /// getVarInfo - Return the VarInfo structure for the specified VIRTUAL