X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=include%2Fllvm%2FCodeGen%2FPasses.h;h=dd677fa5b130a63ab85cbefe831f087ba5666140;hb=4b84086e89d86fb16f562166d9fea8df37db6be7;hp=cf08b7f2d93c0bb94127f6fab1f8de3c0ce5344a;hpb=a8c768293966822840199b496a9b020b6b460e8d;p=oota-llvm.git diff --git a/include/llvm/CodeGen/Passes.h b/include/llvm/CodeGen/Passes.h index cf08b7f2d93..dd677fa5b13 100644 --- a/include/llvm/CodeGen/Passes.h +++ b/include/llvm/CodeGen/Passes.h @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // @@ -23,6 +23,7 @@ namespace llvm { class FunctionPass; class PassInfo; class TargetMachine; + class RegisterCoalescer; /// createUnreachableBlockEliminationPass - The LLVM code generator does not /// work well with unreachable basic blocks (what live ranges make sense for a @@ -37,22 +38,38 @@ namespace llvm { FunctionPass *createMachineFunctionPrinterPass(std::ostream *OS, const std::string &Banner =""); + /// MachineLoopInfo pass - This pass is a loop analysis pass. + /// + extern const PassInfo *const MachineLoopInfoID; + + /// MachineDominators pass - This pass is a machine dominators analysis pass. + /// + extern const PassInfo *const MachineDominatorsID; + /// PHIElimination pass - This pass eliminates machine instruction PHI nodes /// by inserting copy instructions. This destroys SSA information, but is the /// desired input for some register allocators. This pass is "required" by /// these register allocator like this: AU.addRequiredID(PHIEliminationID); /// - extern const PassInfo *PHIEliminationID; + extern const PassInfo *const PHIEliminationID; + + /// StrongPHIElimination pass - This pass eliminates machine instruction PHI + /// nodes by inserting copy instructions. This destroys SSA information, but + /// is the desired input for some register allocators. This pass is + /// "required" by these register allocator like this: + /// AU.addRequiredID(PHIEliminationID); + /// This pass is still in development + extern const PassInfo *const StrongPHIEliminationID; /// SimpleRegisterCoalescing pass. Aggressively coalesces every register /// copy it can. /// - extern const PassInfo *SimpleRegisterCoalescingID; + extern const PassInfo *const SimpleRegisterCoalescingID; /// TwoAddressInstruction pass - This pass reduces two-address instructions to /// use two operands. This destroys SSA information but it is desired by /// register allocators. - extern const PassInfo *TwoAddressInstructionPassID; + extern const PassInfo *const TwoAddressInstructionPassID; /// Creates a register allocator as the user specified on the command line. /// @@ -84,10 +101,24 @@ namespace llvm { /// FunctionPass *createLinearScanRegisterAllocator(); + /// SimpleRegisterCoalescing Pass - Coalesce all copies possible. Can run + /// independently of the register allocator. + /// + RegisterCoalescer *createSimpleRegisterCoalescer(); + /// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code, /// and eliminates abstract frame references. /// FunctionPass *createPrologEpilogCodeInserter(); + + /// LowerSubregs Pass - This pass lowers subregs to register-register copies + /// which yields suboptimal, but correct code if the register allocator + /// cannot coalesce all subreg operations during allocation. + /// + FunctionPass *createLowerSubregsPass(); + + /// createPostRAScheduler - under development. + FunctionPass *createPostRAScheduler(); /// BranchFolding Pass - This pass performs machine code CFG based /// optimizations to delete branches to branches, eliminate branches to @@ -98,6 +129,10 @@ namespace llvm { /// IfConverter Pass - This pass performs machine code if conversion. FunctionPass *createIfConverterPass(); + /// LoopAligner Pass - This pass aligns loop headers to target specific + /// alignment boundary. + FunctionPass *createLoopAlignerPass(); + /// DebugLabelFoldingPass - This pass prunes out redundant debug labels. This /// allows a debug emitter to determine if the range of two labels is empty, /// by seeing if the labels map to the same reduced label. @@ -112,12 +147,35 @@ namespace llvm { /// for the Sparc. FunctionPass *getRegisterAllocator(TargetMachine &T); - //createModuloSchedulingPass - Creates the Swing Modulo Scheduling Pass - FunctionPass *createModuloSchedulingPass(TargetMachine & targ); - - //createModuloSchedulingPass - Creates the Swing Modulo Scheduling Pass - FunctionPass *createModuloSchedulingSBPass(TargetMachine & targ); - + /// IntrinsicLowering Pass - Performs target-independent LLVM IR + /// transformations for highly portable collectors. + FunctionPass *createGCLoweringPass(); + + /// MachineCodeAnalysis Pass - Target-independent pass to mark safe points in + /// machine code. Must be added very late during code generation, just prior + /// to output, and importantly after all CFG transformations (such as branch + /// folding). + FunctionPass *createGCMachineCodeAnalysisPass(); + + /// Deleter Pass - Releases collector metadata. + /// + FunctionPass *createCollectorMetadataDeleter(); + + /// Creates a pass to print collector metadata. + /// + FunctionPass *createCollectorMetadataPrinter(std::ostream &OS); + + /// createMachineLICMPass - This pass performs LICM on machine instructions. + /// + FunctionPass *createMachineLICMPass(); + + /// createMachineSinkingPass - This pass performs sinking on machine + /// instructions. + FunctionPass *createMachineSinkingPass(); + + /// createStackSlotColoringPass - This pass performs stack slot coloring. + FunctionPass *createStackSlotColoringPass(); + } // End llvm namespace #endif