X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=include%2Fllvm%2FCodeGen%2FRegisterScavenging.h;h=8752e67a79d84c4cfde80134a69d4d8ae81517f2;hb=310f248c22c5a20eaa4de1e612af3338a89144f3;hp=40dd66c06a77d8df144fe49570f3175588dfbff7;hpb=9755faab609d65ccd06220625b50dc9d792be3c4;p=oota-llvm.git diff --git a/include/llvm/CodeGen/RegisterScavenging.h b/include/llvm/CodeGen/RegisterScavenging.h index 40dd66c06a7..8752e67a79d 100644 --- a/include/llvm/CodeGen/RegisterScavenging.h +++ b/include/llvm/CodeGen/RegisterScavenging.h @@ -18,8 +18,8 @@ #define LLVM_CODEGEN_REGISTER_SCAVENGING_H #include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/ADT/BitVector.h" -#include "llvm/ADT/DenseMap.h" namespace llvm { @@ -60,26 +60,14 @@ class RegScavenger { /// BitVector CalleeSavedRegs; - /// ReservedRegs - A bitvector of reserved registers. - /// - BitVector ReservedRegs; - /// RegsAvailable - The current state of all the physical registers immediately /// before MBBI. One bit per physical register. If bit is set that means it's /// available, unset means the register is currently being used. BitVector RegsAvailable; - /// ImplicitDefed - If bit is set that means the register is defined by an - /// implicit_def instructions. That means it can be clobbered at will. - BitVector ImplicitDefed; - - /// CurrDist - Distance from MBB entry to the current instruction MBBI. - /// - unsigned CurrDist; - - /// DistanceMap - Keep track the distance of a MI from the start of the - /// current basic block. - DenseMap DistanceMap; + // These BitVectors are only used internally to forward(). They are members + // to avoid frequent reallocations. + BitVector KillRegs, DefRegs; public: RegScavenger() @@ -90,62 +78,34 @@ public: /// basic block. void enterBasicBlock(MachineBasicBlock *mbb); - /// forward / backward - Move the internal MBB iterator and update register - /// states. + /// initRegState - allow resetting register state info for multiple + /// passes over/within the same function. + void initRegState(); + + /// forward - Move the internal MBB iterator and update register states. void forward(); - void backward(); - /// forward / backward - Move the internal MBB iterator and update register - /// states until it has processed the specific iterator. + /// forward - Move the internal MBB iterator and update register states until + /// it has processed the specific iterator. void forward(MachineBasicBlock::iterator I) { + if (!Tracking && MBB->begin() != I) forward(); while (MBBI != I) forward(); } - void backward(MachineBasicBlock::iterator I) { - while (MBBI != I) backward(); - } /// skipTo - Move the internal MBB iterator but do not update register states. /// void skipTo(MachineBasicBlock::iterator I) { MBBI = I; } - /// isReserved - Returns true if a register is reserved. It is never "unused". - bool isReserved(unsigned Reg) const { return ReservedRegs[Reg]; } - - /// isUsed / isUsed - Test if a register is currently being used. - /// - bool isUsed(unsigned Reg) const { return !RegsAvailable[Reg]; } - bool isUnused(unsigned Reg) const { return RegsAvailable[Reg]; } - - bool isImplicitlyDefined(unsigned Reg) const { return ImplicitDefed[Reg]; } - /// getRegsUsed - return all registers currently in use in used. void getRegsUsed(BitVector &used, bool includeReserved); - /// setUsed / setUnused - Mark the state of one or a number of registers. - /// - void setUsed(unsigned Reg, bool ImpDef = false); - void setUsed(BitVector Regs, bool ImpDef = false) { - RegsAvailable &= ~Regs; - if (ImpDef) - ImplicitDefed |= Regs; - else - ImplicitDefed &= ~Regs; - } - void setUnused(unsigned Reg, const MachineInstr *MI); - void setUnused(BitVector Regs) { - RegsAvailable |= Regs; - ImplicitDefed &= ~Regs; - } - - /// FindUnusedReg - Find a unused register of the specified register class - /// from the specified set of registers. It return 0 is none is found. - unsigned FindUnusedReg(const TargetRegisterClass *RegClass, - const BitVector &Candidates) const; + /// getRegsAvailable - Return all available registers in the register class + /// in Mask. + BitVector getRegsAvailable(const TargetRegisterClass *RC); /// FindUnusedReg - Find a unused register of the specified register class. - /// Exclude callee saved registers if directed. It return 0 is none is found. - unsigned FindUnusedReg(const TargetRegisterClass *RegClass, - bool ExCalleeSaved = false) const; + /// Return 0 if none is found. + unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const; /// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter of /// ScavengingFrameIndex. @@ -162,16 +122,48 @@ public: return scavengeRegister(RegClass, MBBI, SPAdj); } + /// setUsed - Tell the scavenger a register is used. + /// + void setUsed(unsigned Reg); private: - /// restoreScavengedReg - Restore scavenged by loading it back from the - /// emergency spill slot. Mark it used. - void restoreScavengedReg(); + /// isReserved - Returns true if a register is reserved. It is never "unused". + bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); } + + /// isUsed - Test if a register is currently being used. When called by the + /// isAliasUsed function, we only check isReserved if this is the original + /// register, not an alias register. + /// + bool isUsed(unsigned Reg, bool CheckReserved = true) const { + return !RegsAvailable.test(Reg) || (CheckReserved && isReserved(Reg)); + } + + /// isAliasUsed - Is Reg or an alias currently in use? + bool isAliasUsed(unsigned Reg) const; + + /// setUsed / setUnused - Mark the state of one or a number of registers. + /// + void setUsed(BitVector &Regs) { + RegsAvailable.reset(Regs); + } + void setUnused(BitVector &Regs) { + RegsAvailable |= Regs; + } + + /// Add Reg and all its sub-registers to BV. + void addRegWithSubRegs(BitVector &BV, unsigned Reg); + + /// findSurvivorReg - Return the candidate register that is unused for the + /// longest after StartMI. UseMI is set to the instruction where the search + /// stopped. + /// + /// No more than InstrLimit instructions are inspected. + unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI, + BitVector &Candidates, + unsigned InstrLimit, + MachineBasicBlock::iterator &UseMI); - MachineInstr *findFirstUse(MachineBasicBlock *MBB, - MachineBasicBlock::iterator I, unsigned Reg, - unsigned &Dist); }; - + } // End llvm namespace #endif