X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=include%2Fllvm%2FCodeGen%2FRegisterScavenging.h;h=8752e67a79d84c4cfde80134a69d4d8ae81517f2;hb=310f248c22c5a20eaa4de1e612af3338a89144f3;hp=63b3289c7f28e55b8168754a5a85c519cb8d8e29;hpb=6130f66eaae89f8878590796977678afa8448926;p=oota-llvm.git

diff --git a/include/llvm/CodeGen/RegisterScavenging.h b/include/llvm/CodeGen/RegisterScavenging.h
index 63b3289c7f2..8752e67a79d 100644
--- a/include/llvm/CodeGen/RegisterScavenging.h
+++ b/include/llvm/CodeGen/RegisterScavenging.h
@@ -18,15 +18,20 @@
 #define LLVM_CODEGEN_REGISTER_SCAVENGING_H
 
 #include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/ADT/BitVector.h"
 
 namespace llvm {
 
+class MachineRegisterInfo;
 class TargetRegisterInfo;
 class TargetInstrInfo;
 class TargetRegisterClass;
 
 class RegScavenger {
+  const TargetRegisterInfo *TRI;
+  const TargetInstrInfo *TII;
+  MachineRegisterInfo* MRI;
   MachineBasicBlock *MBB;
   MachineBasicBlock::iterator MBBI;
   unsigned NumPhysRegs;
@@ -47,69 +52,60 @@ class RegScavenger {
   ///
   const TargetRegisterClass *ScavengedRC;
 
+  /// ScavengeRestore - Instruction that restores the scavenged register from
+  /// stack.
+  const MachineInstr *ScavengeRestore;
+
+  /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
+  ///
+  BitVector CalleeSavedRegs;
+
   /// RegsAvailable - The current state of all the physical registers immediately
   /// before MBBI. One bit per physical register. If bit is set that means it's
   /// available, unset means the register is currently being used.
   BitVector RegsAvailable;
 
+  // These BitVectors are only used internally to forward(). They are members
+  // to avoid frequent reallocations.
+  BitVector KillRegs, DefRegs;
+
 public:
   RegScavenger()
     : MBB(NULL), NumPhysRegs(0), Tracking(false),
       ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
 
-  explicit RegScavenger(MachineBasicBlock *mbb)
-    : MBB(mbb), NumPhysRegs(0), Tracking(false),
-      ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
-
   /// enterBasicBlock - Start tracking liveness from the begin of the specific
   /// basic block.
   void enterBasicBlock(MachineBasicBlock *mbb);
 
-  /// forward / backward - Move the internal MBB iterator and update register
-  /// states.
+  /// initRegState - allow resetting register state info for multiple
+  /// passes over/within the same function.
+  void initRegState();
+
+  /// forward - Move the internal MBB iterator and update register states.
   void forward();
-  void backward();
 
-  /// forward / backward - Move the internal MBB iterator and update register
-  /// states until it has processed the specific iterator.
+  /// forward - Move the internal MBB iterator and update register states until
+  /// it has processed the specific iterator.
   void forward(MachineBasicBlock::iterator I) {
+    if (!Tracking && MBB->begin() != I) forward();
     while (MBBI != I) forward();
   }
-  void backward(MachineBasicBlock::iterator I) {
-    while (MBBI != I) backward();
-  }
 
   /// skipTo - Move the internal MBB iterator but do not update register states.
   ///
   void skipTo(MachineBasicBlock::iterator I) { MBBI = I; }
 
-  /// isReserved - Returns true if a register is reserved. It is never "unused".
-  bool isReserved(unsigned Reg) const { return ReservedRegs[Reg]; }
-
-  /// isUsed / isUsed - Test if a register is currently being used.
-  ///
-  bool isUsed(unsigned Reg) const   { return !RegsAvailable[Reg]; }
-  bool isUnused(unsigned Reg) const { return RegsAvailable[Reg]; }
-
   /// getRegsUsed - return all registers currently in use in used.
   void getRegsUsed(BitVector &used, bool includeReserved);
 
-  /// setUsed / setUnused - Mark the state of one or a number of registers.
-  ///
-  void setUsed(unsigned Reg);
-  void setUsed(BitVector Regs)   { RegsAvailable &= ~Regs; }
-  void setUnused(unsigned Reg);
-  void setUnused(BitVector Regs) { RegsAvailable |= Regs; }
-
-  /// FindUnusedReg - Find a unused register of the specified register class
-  /// from the specified set of registers. It return 0 is none is found.
-  unsigned FindUnusedReg(const TargetRegisterClass *RegClass,
-                         const BitVector &Candidates) const;
+  /// getRegsAvailable - Return all available registers in the register class
+  /// in Mask.
+  BitVector getRegsAvailable(const TargetRegisterClass *RC);
 
   /// FindUnusedReg - Find a unused register of the specified register class.
-  /// Exclude callee saved registers if directed. It return 0 is none is found.
-  unsigned FindUnusedReg(const TargetRegisterClass *RegClass,
-                         bool ExCalleeSaved = false) const;
+  /// Return 0 if none is found.
+  unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
 
   /// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter of
   /// ScavengingFrameIndex.
@@ -126,23 +122,48 @@ public:
     return scavengeRegister(RegClass, MBBI, SPAdj);
   }
 
+  /// setUsed - Tell the scavenger a register is used.
+  ///
+  void setUsed(unsigned Reg);
 private:
-  const TargetRegisterInfo *TRI;
-  const TargetInstrInfo *TII;
+  /// isReserved - Returns true if a register is reserved. It is never "unused".
+  bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
 
-  /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
+  /// isUsed - Test if a register is currently being used.  When called by the
+  /// isAliasUsed function, we only check isReserved if this is the original
+  /// register, not an alias register.
   ///
-  BitVector CalleeSavedRegs;
+  bool isUsed(unsigned Reg, bool CheckReserved = true) const   {
+    return !RegsAvailable.test(Reg) || (CheckReserved && isReserved(Reg));
+  }
+
+  /// isAliasUsed - Is Reg or an alias currently in use?
+  bool isAliasUsed(unsigned Reg) const;
 
-  /// ReservedRegs - A bitvector of reserved registers.
+  /// setUsed / setUnused - Mark the state of one or a number of registers.
   ///
-  BitVector ReservedRegs;
+  void setUsed(BitVector &Regs) {
+    RegsAvailable.reset(Regs);
+  }
+  void setUnused(BitVector &Regs) {
+    RegsAvailable |= Regs;
+  }
+
+  /// Add Reg and all its sub-registers to BV.
+  void addRegWithSubRegs(BitVector &BV, unsigned Reg);
+
+  /// findSurvivorReg - Return the candidate register that is unused for the
+  /// longest after StartMI. UseMI is set to the instruction where the search
+  /// stopped.
+  ///
+  /// No more than InstrLimit instructions are inspected.
+  unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
+                           BitVector &Candidates,
+                           unsigned InstrLimit,
+                           MachineBasicBlock::iterator &UseMI);
 
-  /// restoreScavengedReg - Restore scavenged by loading it back from the
-  /// emergency spill slot. Mark it used.
-  void restoreScavengedReg();
 };
- 
+
 } // End llvm namespace
 
 #endif