X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=include%2Fllvm%2FCodeGen%2FScheduleDAG.h;h=e90bceb7be50f656df299c28f8adcd97ad7fd9ba;hb=3cc6243ddfdba3ad64035b919c88b09773a60880;hp=125f8eaa8cefba552fe7c505813e586f07321282;hpb=f449bf36ef5cb8e23fa2b5bc43f8d54d2b48fa4e;p=oota-llvm.git

diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h
index 125f8eaa8ce..e90bceb7be5 100644
--- a/include/llvm/CodeGen/ScheduleDAG.h
+++ b/include/llvm/CodeGen/ScheduleDAG.h
@@ -22,7 +22,6 @@
 #include "llvm/ADT/SmallSet.h"
 
 namespace llvm {
-  struct InstrStage;
   struct SUnit;
   class MachineConstantPool;
   class MachineFunction;
@@ -30,6 +29,7 @@ namespace llvm {
   class MachineRegisterInfo;
   class MachineInstr;
   class TargetRegisterInfo;
+  class ScheduleDAG;
   class SelectionDAG;
   class SelectionDAGISel;
   class TargetInstrInfo;
@@ -240,8 +240,8 @@ namespace llvm {
       return false;
     }
     
-    void dump(const SelectionDAG *G) const;
-    void dumpAll(const SelectionDAG *G) const;
+    void dump(const ScheduleDAG *G) const;
+    void dumpAll(const ScheduleDAG *G) const;
   };
 
   //===--------------------------------------------------------------------===//
@@ -334,6 +334,14 @@ namespace llvm {
       return &SUnits.back();
     }
 
+    /// NewSUnit - Creates a new SUnit and return a ptr to it.
+    ///
+    SUnit *NewSUnit(MachineInstr *MI) {
+      SUnits.push_back(SUnit(MI, (unsigned)SUnits.size()));
+      SUnits.back().OrigNode = &SUnits.back();
+      return &SUnits.back();
+    }
+
     /// Clone - Creates a clone of the specified SUnit. It does not copy the
     /// predecessors / successors info nor the temporary scheduling states.
     SUnit *Clone(SUnit *N);
@@ -431,6 +439,11 @@ namespace llvm {
     /// and if it has live ins that need to be copied into vregs, emit the
     /// copies into the top of the block.
     void EmitLiveInCopies(MachineBasicBlock *MBB);
+
+    /// BuildSchedUnitsFromMBB - Build SUnits from the MachineBasicBlock.
+    /// This SUnit graph is similar to the pre-regalloc SUnit graph, but represents
+    /// MachineInstrs directly instead of SDNodes.
+    void BuildSchedUnitsFromMBB();
   };
 
   /// createBURRListDAGScheduler - This creates a bottom up register usage