X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=include%2Fllvm%2FCodeGen%2FSelectionDAGNodes.h;h=395f1bf3fdce8eb9418843f47f8eeb35fde3e148;hb=1612faae3cf7ecfaddba64f7064f0ce4b32dd471;hp=5d1a0e3efb4f0f094095b11623a66f4936747c0e;hpb=423c2260f95883f7c84ac962e58ac66c3a11efac;p=oota-llvm.git diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index 5d1a0e3efb4..395f1bf3fdc 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -2,8 +2,8 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by the LLVM research group and is distributed under -// the University of Illinois Open Source License. See LICENSE.TXT for details. +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // @@ -23,6 +23,7 @@ #include "llvm/ADT/FoldingSet.h" #include "llvm/ADT/GraphTraits.h" #include "llvm/ADT/iterator" +#include "llvm/ADT/APFloat.h" #include "llvm/CodeGen/ValueTypes.h" #include "llvm/Support/DataTypes.h" #include @@ -34,6 +35,7 @@ class GlobalValue; class MachineBasicBlock; class MachineConstantPoolValue; class SDNode; +template struct DenseMapInfo; template struct simplify_type; template struct ilist_traits; template class iplist; @@ -63,6 +65,14 @@ namespace ISD { InRegOffs = 2, StructReturn = 1<<3, ///< Hidden struct-return pointer StructReturnOffs = 3, + ByVal = 1<<4, ///< Struct passed by value + ByValOffs = 4, + Nest = 1<<5, ///< Parameter is nested function static chain + NestOffs = 5, + ByValAlign = 0xF << 6, //< The alignment of the struct + ByValAlignOffs = 6, + ByValSize = 0x1ffff << 10, //< The size of the struct + ByValSizeOffs = 10, OrigAlignment = 0x1F<<27, OrigAlignmentOffs = 27 }; @@ -95,7 +105,8 @@ namespace ISD { // Various leaf nodes. STRING, BasicBlock, VALUETYPE, CONDCODE, Register, Constant, ConstantFP, - GlobalAddress, FrameIndex, JumpTable, ConstantPool, ExternalSymbol, + GlobalAddress, GlobalTLSAddress, FrameIndex, + JumpTable, ConstantPool, ExternalSymbol, // The address of the GOT GLOBAL_OFFSET_TABLE, @@ -106,6 +117,11 @@ namespace ISD { // to the current function's frame or return address, an index of one to the // parent's frame or return address, and so on. FRAMEADDR, RETURNADDR, + + // FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to + // first (possible) on-stack argument. This is needed for correct stack + // adjustment during unwind. + FRAME_TO_ARGS_OFFSET, // RESULT, OUTCHAIN = EXCEPTIONADDR(INCHAIN) - This node represents the // address of the exception block on entry to an landing pad block. @@ -115,6 +131,12 @@ namespace ISD { // the selection index of the exception thrown. EHSELECTION, + // OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents + // 'eh_return' gcc dwarf builtin, which is used to return from + // exception. The general meaning is: adjust stack by OFFSET and pass + // execution to HANDLER. Many platform-related details also :) + EH_RETURN, + // TargetConstant* - Like Constant*, but the DAG does not do any folding or // simplification of the constant. TargetConstant, @@ -124,6 +146,7 @@ namespace ISD { // anything else with this node, and this is valid in the target-specific // dag, turning into a GlobalAddress operand. TargetGlobalAddress, + TargetGlobalTLSAddress, TargetFrameIndex, TargetJumpTable, TargetConstantPool, @@ -157,7 +180,7 @@ namespace ISD { // CopyFromReg - This node indicates that the input value is a virtual or // physical register that is defined outside of the scope of this - // SelectionDAG. The register is available from the RegSDNode object. + // SelectionDAG. The register is available from the RegisterSDNode object. CopyFromReg, // UNDEF - An undefined node @@ -182,6 +205,10 @@ namespace ISD { /// Bit 0 - signness /// Bit 1 - 'inreg' attribute /// Bit 2 - 'sret' attribute + /// Bit 4 - 'byval' attribute + /// Bit 5 - 'nest' attribute + /// Bit 6-9 - alignment of byval structures + /// Bit 10-26 - size of byval structures /// Bits 31:27 - argument ABI alignment in the first argument piece and /// alignment '1' in other argument pieces. CALL, @@ -206,6 +233,15 @@ namespace ISD { // Simple integer binary arithmetic operators. ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, + + // SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing + // a signed/unsigned value of type i[2*N], and return the full value as + // two results, each of type iN. + SMUL_LOHI, UMUL_LOHI, + + // SDIVREM/UDIVREM - Divide two integers and produce both a quotient and + // remainder result. + SDIVREM, UDIVREM, // CARRY_FALSE - This node is used when folding other nodes, // like ADDC/SUBC, which indicate the carry result is always false. @@ -235,45 +271,34 @@ namespace ISD { // FCOPYSIGN(f32, f64) is allowed. FCOPYSIGN, - /// VBUILD_VECTOR(ELT1, ELT2, ELT3, ELT4,..., COUNT,TYPE) - Return a vector - /// with the specified, possibly variable, elements. The number of elements - /// is required to be a power of two. - VBUILD_VECTOR, - - /// BUILD_VECTOR(ELT1, ELT2, ELT3, ELT4,...) - Return a vector + // INT = FGETSIGN(FP) - Return the sign bit of the specified floating point + // value as an integer 0/1 value. + FGETSIGN, + + /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector /// with the specified, possibly variable, elements. The number of elements /// is required to be a power of two. BUILD_VECTOR, - /// VINSERT_VECTOR_ELT(VECTOR, VAL, IDX, COUNT,TYPE) - Given a vector - /// VECTOR, an element ELEMENT, and a (potentially variable) index IDX, - /// return an vector with the specified element of VECTOR replaced with VAL. - /// COUNT and TYPE specify the type of vector, as is standard for V* nodes. - VINSERT_VECTOR_ELT, - - /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR (a legal packed - /// type) with the element at IDX replaced with VAL. + /// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element + /// at IDX replaced with VAL. INSERT_VECTOR_ELT, - /// VEXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR - /// (an MVT::Vector value) identified by the (potentially variable) element - /// number IDX. - VEXTRACT_VECTOR_ELT, - /// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR - /// (a legal vector type vector) identified by the (potentially variable) - /// element number IDX. + /// identified by the (potentially variable) element number IDX. EXTRACT_VECTOR_ELT, - /// VVECTOR_SHUFFLE(VEC1, VEC2, SHUFFLEVEC, COUNT,TYPE) - Returns a vector, - /// of the same type as VEC1/VEC2. SHUFFLEVEC is a VBUILD_VECTOR of - /// constant int values that indicate which value each result element will - /// get. The elements of VEC1/VEC2 are enumerated in order. This is quite - /// similar to the Altivec 'vperm' instruction, except that the indices must - /// be constants and are in terms of the element size of VEC1/VEC2, not in - /// terms of bytes. - VVECTOR_SHUFFLE, - + /// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of + /// vector type with the same length and element type, this produces a + /// concatenated vector result value, with length equal to the sum of the + /// lengths of the input vectors. + CONCAT_VECTORS, + + /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an + /// vector value) starting with the (potentially variable) element number + /// IDX, which must be a multiple of the result vector length. + EXTRACT_SUBVECTOR, + /// VECTOR_SHUFFLE(VEC1, VEC2, SHUFFLEVEC) - Returns a vector, of the same /// type as VEC1/VEC2. SHUFFLEVEC is a BUILD_VECTOR of constant int values /// (regardless of whether its datatype is legal or not) that indicate @@ -283,41 +308,22 @@ namespace ISD { /// of the element size of VEC1/VEC2, not in terms of bytes. VECTOR_SHUFFLE, - /// X = VBIT_CONVERT(Y) and X = VBIT_CONVERT(Y, COUNT,TYPE) - This node - /// represents a conversion from or to an ISD::Vector type. - /// - /// This is lowered to a BIT_CONVERT of the appropriate input/output types. - /// The input and output are required to have the same size and at least one - /// is required to be a vector (if neither is a vector, just use - /// BIT_CONVERT). - /// - /// If the result is a vector, this takes three operands (like any other - /// vector producer) which indicate the size and type of the vector result. - /// Otherwise it takes one input. - VBIT_CONVERT, - - /// BINOP(LHS, RHS, COUNT,TYPE) - /// Simple abstract vector operators. Unlike the integer and floating point - /// binary operators, these nodes also take two additional operands: - /// a constant element count, and a value type node indicating the type of - /// the elements. The order is count, type, op0, op1. All vector opcodes, - /// including VLOAD and VConstant must currently have count and type as - /// their last two operands. - VADD, VSUB, VMUL, VSDIV, VUDIV, - VAND, VOR, VXOR, - - /// VSELECT(COND,LHS,RHS, COUNT,TYPE) - Select for MVT::Vector values. - /// COND is a boolean value. This node return LHS if COND is true, RHS if - /// COND is false. - VSELECT, - /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a - /// scalar value into the low element of the resultant vector type. The top - /// elements of the vector are undefined. + /// scalar value into element 0 of the resultant vector type. The top + /// elements 1 to N-1 of the N-element vector are undefined. SCALAR_TO_VECTOR, + // EXTRACT_SUBREG - This node is used to extract a sub-register value. + // This node takes a superreg and a constant sub-register index as operands. + EXTRACT_SUBREG, + + // INSERT_SUBREG - This node is used to insert a sub-register value. + // This node takes a superreg, a subreg value, and a constant sub-register + // index as operands. + INSERT_SUBREG, + // MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing - // an unsigned/signed value of type i[2*n], then return the top part. + // an unsigned/signed value of type i[2*N], then return the top part. MULHU, MULHS, // Bitwise operators - logical and, logical or, logical xor, shift left, @@ -379,23 +385,40 @@ namespace ISD { // operand, a ValueType node. SIGN_EXTEND_INREG, - // FP_TO_[US]INT - Convert a floating point value to a signed or unsigned - // integer. + /// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned + /// integer. FP_TO_SINT, FP_TO_UINT, - // FP_ROUND - Perform a rounding operation from the current - // precision down to the specified precision (currently always 64->32). + /// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type + /// down to the precision of the destination VT. TRUNC is a flag, which is + /// always an integer that is zero or one. If TRUNC is 0, this is a + /// normal rounding, if it is 1, this FP_ROUND is known to not change the + /// value of Y. + /// + /// The TRUNC = 1 case is used in cases where we know that the value will + /// not be modified by the node, because Y is not using any of the extra + /// precision of source type. This allows certain transformations like + /// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for + /// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed. FP_ROUND, - - // FP_ROUND_INREG - This operator takes a floating point register, and - // rounds it to a floating point value. It then promotes it and returns it - // in a register of the same size. This operation effectively just discards - // excess precision. The type to round down to is specified by the 1th - // operation, a VTSDNode (currently always 64->32->64). + + // FLT_ROUNDS - Returns current rounding mode: + // -1 Undefined + // 0 Round to 0 + // 1 Round to nearest + // 2 Round to +inf + // 3 Round to -inf + FLT_ROUNDS, + + /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and + /// rounds it to a floating point value. It then promotes it and returns it + /// in a register of the same size. This operation effectively just + /// discards excess precision. The type to round down to is specified by + /// the VT operand, a VTSDNode. FP_ROUND_INREG, - // FP_EXTEND - Extend a smaller FP type into a larger FP type. + /// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type. FP_EXTEND, // BIT_CONVERT - Theis operator converts between integer and FP values, as @@ -406,10 +429,10 @@ namespace ISD { // conversions, but that is a noop, deleted by getNode(). BIT_CONVERT, - // FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI - Perform unary floating point - // negation, absolute value, square root, sine and cosine, and powi + // FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW - Perform unary floating point + // negation, absolute value, square root, sine and cosine, powi, and pow // operations. - FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, + FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, // LOAD and STORE have token chains as their first operand, then the same // operands as an LLVM load/store instruction, then an offset node that @@ -417,23 +440,12 @@ namespace ISD { // indexed memory ops). LOAD, STORE, - // Abstract vector version of LOAD. VLOAD has a constant element count as - // the first operand, followed by a value type node indicating the type of - // the elements, a token chain, a pointer operand, and a SRCVALUE node. - VLOAD, - - // TRUNCSTORE - This operators truncates (for integer) or rounds (for FP) a - // value and stores it to memory in one operation. This can be used for - // either integer or floating point operands. The first four operands of - // this are the same as a standard store. The fifth is the ValueType to - // store it as (which will be smaller than the source value). - TRUNCSTORE, - // DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned - // to a specified boundary. The first operand is the token chain, the - // second is the number of bytes to allocate, and the third is the alignment - // boundary. The size is guaranteed to be a multiple of the stack - // alignment, and the alignment is guaranteed to be bigger than the stack + // to a specified boundary. This node always has two return values: a new + // stack pointer value and a chain. The first operand is the token chain, + // the second is the number of bytes to allocate, and the third is the + // alignment boundary. The size is guaranteed to be a multiple of the stack + // alignment, and the alignment is guaranteed to be bigger than the stack // alignment (if required) or 0 to get standard stack alignment. DYNAMIC_STACKALLOC, @@ -494,10 +506,10 @@ namespace ISD { // it returns an output chain. STACKRESTORE, - // MEMSET/MEMCPY/MEMMOVE - The first operand is the chain, and the rest - // correspond to the operands of the LLVM intrinsic functions. The only - // result is a token chain. The alignment argument is guaranteed to be a - // Constant node. + // MEMSET/MEMCPY/MEMMOVE - The first operand is the chain. The following + // correspond to the operands of the LLVM intrinsic functions and the last + // one is AlwaysInline. The only result is a token chain. The alignment + // argument is guaranteed to be a Constant node. MEMSET, MEMMOVE, MEMCPY, @@ -550,7 +562,19 @@ namespace ISD { // number, then a column then a file id (provided by MachineModuleInfo.) It // produces a token chain as output. DEBUG_LOC, - + + // TRAMPOLINE - This corresponds to the init_trampoline intrinsic. + // It takes as input a token chain, the pointer to the trampoline, + // the pointer to the nested function, the pointer to pass for the + // 'nest' parameter, a SRCVALUE for the trampoline and another for + // the nested function (allowing targets to access the original + // Function*). It produces the result of the intrinsic and a token + // chain as output. + TRAMPOLINE, + + // TRAP - Trapping instruction + TRAP, + // BUILTIN_OP_END - This must be the last enum value in this list. BUILTIN_OP_END }; @@ -765,12 +789,37 @@ public: inline bool isTargetOpcode() const; inline unsigned getTargetOpcode() const; + + /// reachesChainWithoutSideEffects - Return true if this operand (which must + /// be a chain) reaches the specified operand without crossing any + /// side-effecting instructions. In practice, this looks through token + /// factors and non-volatile loads. In order to remain efficient, this only + /// looks a couple of nodes in, it does not do an exhaustive search. + bool reachesChainWithoutSideEffects(SDOperand Dest, unsigned Depth = 2) const; + /// hasOneUse - Return true if there is exactly one operation using this /// result value of the defining operator. inline bool hasOneUse() const; + + /// use_empty - Return true if there are no operations using this + /// result value of the defining operator. + inline bool use_empty() const; }; +template<> struct DenseMapInfo { + static inline SDOperand getEmptyKey() { return SDOperand((SDNode*)-1, -1U); } + static inline SDOperand getTombstoneKey() { return SDOperand((SDNode*)-1, 0);} + static unsigned getHashValue(const SDOperand &Val) { + return (unsigned)((uintptr_t)Val.Val >> 4) ^ + (unsigned)((uintptr_t)Val.Val >> 9) + Val.ResNo; + } + static bool isEqual(const SDOperand &LHS, const SDOperand &RHS) { + return LHS == RHS; + } + static bool isPod() { return true; } +}; + /// simplify_type specializations - Allow casting operators to work directly on /// SDOperands as if they were SDNode*'s. template<> struct simplify_type { @@ -847,6 +896,9 @@ public: /// int getNodeId() const { return NodeId; } + /// setNodeId - Set unique node id. + void setNodeId(int Id) { NodeId = Id; } + typedef SmallVector::const_iterator use_iterator; use_iterator use_begin() const { return Uses.begin(); } use_iterator use_end() const { return Uses.end(); } @@ -856,6 +908,10 @@ public: /// operation. bool hasNUsesOfValue(unsigned NUses, unsigned Value) const; + /// hasAnyUseOfValue - Return true if there are any use of the indicated + /// value. This method ignores uses of other values defined by this operation. + bool hasAnyUseOfValue(unsigned Value) const; + /// isOnlyUse - Return true if this node is the only use of N. /// bool isOnlyUse(SDNode *N) const; @@ -911,7 +967,7 @@ public: /// getOperationName - Return the opcode of this operation for printing. /// - const char* getOperationName(const SelectionDAG *G = 0) const; + std::string getOperationName(const SelectionDAG *G = 0) const; static const char* getIndexedModeName(ISD::MemIndexedMode AM); void dump() const; void dump(const SelectionDAG *G) const; @@ -990,10 +1046,6 @@ protected: } } } - - void setNodeId(int Id) { - NodeId = Id; - } }; @@ -1023,6 +1075,9 @@ inline unsigned SDOperand::getTargetOpcode() const { inline bool SDOperand::hasOneUse() const { return Val->hasNUsesOfValue(1, ResNo); } +inline bool SDOperand::use_empty() const { + return !Val->hasAnyUseOfValue(ResNo); +} /// UnarySDNode - This class is used for single-operand SDNodes. This is solely /// to allow co-allocation of node operands with the node itself. @@ -1130,23 +1185,37 @@ public: }; class ConstantFPSDNode : public SDNode { - double Value; + APFloat Value; virtual void ANCHOR(); // Out-of-line virtual method to give class a home. + // Longterm plan: replace all uses of getValue with getValueAPF, remove + // getValue, rename getValueAPF to getValue. protected: friend class SelectionDAG; - ConstantFPSDNode(bool isTarget, double val, MVT::ValueType VT) + ConstantFPSDNode(bool isTarget, const APFloat& val, MVT::ValueType VT) : SDNode(isTarget ? ISD::TargetConstantFP : ISD::ConstantFP, getSDVTList(VT)), Value(val) { } public: - double getValue() const { return Value; } + const APFloat& getValueAPF() const { return Value; } /// isExactlyValue - We don't rely on operator== working on double values, as /// it returns true for things that are clearly not equal, like -0.0 and 0.0. /// As such, this method can be used to do an exact bit-for-bit comparison of /// two floating point values. - bool isExactlyValue(double V) const; + + /// We leave the version with the double argument here because it's just so + /// convenient to write "2.0" and the like. Without this function we'd + /// have to duplicate its logic everywhere it's called. + bool isExactlyValue(double V) const { + if (getValueType(0)==MVT::f64) + return isExactlyValue(APFloat(V)); + else + return isExactlyValue(APFloat((float)V)); + } + bool isExactlyValue(const APFloat& V) const; + + bool isValueValidForType(MVT::ValueType VT, const APFloat& Val); static bool classof(const ConstantFPSDNode *) { return true; } static bool classof(const SDNode *N) { @@ -1162,11 +1231,7 @@ class GlobalAddressSDNode : public SDNode { protected: friend class SelectionDAG; GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, MVT::ValueType VT, - int o = 0) - : SDNode(isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress, - getSDVTList(VT)), Offset(o) { - TheGlobal = const_cast(GA); - } + int o = 0); public: GlobalValue *getGlobal() const { return TheGlobal; } @@ -1175,11 +1240,12 @@ public: static bool classof(const GlobalAddressSDNode *) { return true; } static bool classof(const SDNode *N) { return N->getOpcode() == ISD::GlobalAddress || - N->getOpcode() == ISD::TargetGlobalAddress; + N->getOpcode() == ISD::TargetGlobalAddress || + N->getOpcode() == ISD::GlobalTLSAddress || + N->getOpcode() == ISD::TargetGlobalTLSAddress; } }; - class FrameIndexSDNode : public SDNode { int FI; virtual void ANCHOR(); // Out-of-line virtual method to give class a home. @@ -1408,11 +1474,63 @@ public: } }; +/// LSBaseSDNode - Base class for LoadSDNode and StoreSDNode +/// +class LSBaseSDNode : public SDNode { +private: + //! SrcValue - Memory location for alias analysis. + const Value *SrcValue; + + //! SVOffset - Memory location offset. + int SVOffset; + + //! Alignment - Alignment of memory location in bytes. + unsigned Alignment; + + //! IsVolatile - True if the store is volatile. + bool IsVolatile; +protected: + //! Operand array for load and store + /*! + \note Moving this array to the base class captures more + common functionality shared between LoadSDNode and + StoreSDNode + */ + SDOperand Ops[4]; +public: + LSBaseSDNode(ISD::NodeType NodeTy, SDVTList VTs, const Value *SV, int SVO, + unsigned Align, bool Vol) + : SDNode(NodeTy, VTs), + SrcValue(SV), SVOffset(SVO), Alignment(Align), IsVolatile(Vol) + { } + + const SDOperand getChain() const { + return getOperand(0); + } + const SDOperand getBasePtr() const { + return getOperand(getOpcode() == ISD::LOAD ? 1 : 2); + } + const SDOperand getOffset() const { + return getOperand(getOpcode() == ISD::LOAD ? 2 : 3); + } + const SDOperand getValue() const { + assert(getOpcode() == ISD::STORE); + return getOperand(1); + } + + const Value *getSrcValue() const { return SrcValue; } + int getSrcValueOffset() const { return SVOffset; } + unsigned getAlignment() const { return Alignment; } + bool isVolatile() const { return IsVolatile; } + + static bool classof(const LSBaseSDNode *N) { return true; } + static bool classof(const SDNode *N) { return true; } +}; + /// LoadSDNode - This class is used to represent ISD::LOAD nodes. /// -class LoadSDNode : public SDNode { +class LoadSDNode : public LSBaseSDNode { virtual void ANCHOR(); // Out-of-line virtual method to give class a home. - SDOperand Ops[3]; // AddrMode - unindexed, pre-indexed, post-indexed. ISD::MemIndexedMode AddrMode; @@ -1422,47 +1540,34 @@ class LoadSDNode : public SDNode { // LoadedVT - VT of loaded value before extension. MVT::ValueType LoadedVT; - - // SrcValue - Memory location for alias analysis. - const Value *SrcValue; - - // SVOffset - Memory location offset. - int SVOffset; - - // Alignment - Alignment of memory location in bytes. - unsigned Alignment; - - // IsVolatile - True if the load is volatile. - bool IsVolatile; protected: friend class SelectionDAG; LoadSDNode(SDOperand *ChainPtrOff, SDVTList VTs, ISD::MemIndexedMode AM, ISD::LoadExtType ETy, MVT::ValueType LVT, - const Value *SV, int O=0, unsigned Align=1, bool Vol=false) - : SDNode(ISD::LOAD, VTs), - AddrMode(AM), ExtType(ETy), LoadedVT(LVT), SrcValue(SV), SVOffset(O), - Alignment(Align), IsVolatile(Vol) { + const Value *SV, int O=0, unsigned Align=0, bool Vol=false) + : LSBaseSDNode(ISD::LOAD, VTs, SV, O, Align, Vol), + AddrMode(AM), ExtType(ETy), LoadedVT(LVT) { Ops[0] = ChainPtrOff[0]; // Chain Ops[1] = ChainPtrOff[1]; // Ptr Ops[2] = ChainPtrOff[2]; // Off InitOperands(Ops, 3); + assert(Align != 0 && "Loads should have non-zero aligment"); assert((getOffset().getOpcode() == ISD::UNDEF || AddrMode != ISD::UNINDEXED) && "Only indexed load has a non-undef offset operand"); } public: - const SDOperand getChain() const { return getOperand(0); } - const SDOperand getBasePtr() const { return getOperand(1); } - const SDOperand getOffset() const { return getOperand(2); } ISD::MemIndexedMode getAddressingMode() const { return AddrMode; } ISD::LoadExtType getExtensionType() const { return ExtType; } MVT::ValueType getLoadedVT() const { return LoadedVT; } - const Value *getSrcValue() const { return SrcValue; } - int getSrcValueOffset() const { return SVOffset; } - unsigned getAlignment() const { return Alignment; } - bool isVolatile() const { return IsVolatile; } + /// isIndexed - Return true if this is a pre/post inc/dec load. + bool isIndexed() const { return AddrMode != ISD::UNINDEXED; } + + /// isUnindexed - Return true if this is NOT a pre/post inc/dec load. + bool isUnindexed() const { return AddrMode == ISD::UNINDEXED; } + static bool classof(const LoadSDNode *) { return true; } static bool classof(const SDNode *N) { return N->getOpcode() == ISD::LOAD; @@ -1471,61 +1576,45 @@ public: /// StoreSDNode - This class is used to represent ISD::STORE nodes. /// -class StoreSDNode : public SDNode { +class StoreSDNode : public LSBaseSDNode { virtual void ANCHOR(); // Out-of-line virtual method to give class a home. - SDOperand Ops[4]; // AddrMode - unindexed, pre-indexed, post-indexed. ISD::MemIndexedMode AddrMode; - // IsTruncStore - True is the op does a truncation before store. + // IsTruncStore - True if the op does a truncation before store. bool IsTruncStore; // StoredVT - VT of the value after truncation. MVT::ValueType StoredVT; - - // SrcValue - Memory location for alias analysis. - const Value *SrcValue; - - // SVOffset - Memory location offset. - int SVOffset; - - // Alignment - Alignment of memory location in bytes. - unsigned Alignment; - - // IsVolatile - True if the store is volatile. - bool IsVolatile; protected: friend class SelectionDAG; StoreSDNode(SDOperand *ChainValuePtrOff, SDVTList VTs, ISD::MemIndexedMode AM, bool isTrunc, MVT::ValueType SVT, const Value *SV, int O=0, unsigned Align=0, bool Vol=false) - : SDNode(ISD::STORE, VTs), - AddrMode(AM), IsTruncStore(isTrunc), StoredVT(SVT), SrcValue(SV), - SVOffset(O), Alignment(Align), IsVolatile(Vol) { + : LSBaseSDNode(ISD::STORE, VTs, SV, O, Align, Vol), + AddrMode(AM), IsTruncStore(isTrunc), StoredVT(SVT) { Ops[0] = ChainValuePtrOff[0]; // Chain Ops[1] = ChainValuePtrOff[1]; // Value Ops[2] = ChainValuePtrOff[2]; // Ptr Ops[3] = ChainValuePtrOff[3]; // Off InitOperands(Ops, 4); - assert((getOffset().getOpcode() == ISD::UNDEF || - AddrMode != ISD::UNINDEXED) && + assert(Align != 0 && "Stores should have non-zero aligment"); + assert((getOffset().getOpcode() == ISD::UNDEF || isIndexed()) && "Only indexed store has a non-undef offset operand"); } public: - const SDOperand getChain() const { return getOperand(0); } - const SDOperand getValue() const { return getOperand(1); } - const SDOperand getBasePtr() const { return getOperand(2); } - const SDOperand getOffset() const { return getOperand(3); } - ISD::MemIndexedMode getAddressingMode() const { return AddrMode; } bool isTruncatingStore() const { return IsTruncStore; } MVT::ValueType getStoredVT() const { return StoredVT; } - const Value *getSrcValue() const { return SrcValue; } - int getSrcValueOffset() const { return SVOffset; } - unsigned getAlignment() const { return Alignment; } - bool isVolatile() const { return IsVolatile; } + ISD::MemIndexedMode getAddressingMode() const { return AddrMode; } + + /// isIndexed - Return true if this is a pre/post inc/dec store. + bool isIndexed() const { return AddrMode != ISD::UNINDEXED; } + /// isUnindexed - Return true if this is NOT a pre/post inc/dec store. + bool isUnindexed() const { return AddrMode == ISD::UNINDEXED; } + static bool classof(const StoreSDNode *) { return true; } static bool classof(const SDNode *N) { return N->getOpcode() == ISD::STORE; @@ -1607,6 +1696,16 @@ struct ilist_traits { }; namespace ISD { + /// isNormalLoad - Returns true if the specified node is a non-extending + /// and unindexed load. + inline bool isNormalLoad(const SDNode *N) { + if (N->getOpcode() != ISD::LOAD) + return false; + const LoadSDNode *Ld = cast(N); + return Ld->getExtensionType() == ISD::NON_EXTLOAD && + Ld->getAddressingMode() == ISD::UNINDEXED; + } + /// isNON_EXTLoad - Returns true if the specified node is a non-extending /// load. inline bool isNON_EXTLoad(const SDNode *N) {