X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=include%2Fllvm%2FCodeGen%2FTargetSchedule.h;h=3c55f1cbc58c5947ee8b5273f2244e87de4a86a8;hb=412cd2f81374865dfa708bef6d5b896ca10dece0;hp=6a5359de149d74dc93ddc8f7cf56027abe37f290;hpb=c92d72abd03b0c29099b3f87f4cb67a299610f03;p=oota-llvm.git

diff --git a/include/llvm/CodeGen/TargetSchedule.h b/include/llvm/CodeGen/TargetSchedule.h
index 6a5359de149..3c55f1cbc58 100644
--- a/include/llvm/CodeGen/TargetSchedule.h
+++ b/include/llvm/CodeGen/TargetSchedule.h
@@ -55,12 +55,29 @@ public:
   /// latency properties, but separate from the per-cycle itinerary data.
   bool hasInstrSchedModel() const;
 
+  const MCSchedModel *getMCSchedModel() const { return &SchedModel; }
+
   /// \brief Return true if this machine model includes cycle-to-cycle itinerary
   /// data.
   ///
   /// This models scheduling at each stage in the processor pipeline.
   bool hasInstrItineraries() const;
 
+  const InstrItineraryData *getInstrItineraries() const {
+    if (hasInstrItineraries())
+      return &InstrItins;
+    return 0;
+  }
+
+  /// \brief Identify the processor corresponding to the current subtarget.
+  unsigned getProcessorID() const { return SchedModel.getProcessorID(); }
+
+  /// \brief Maximum number of micro-ops that may be scheduled per cycle.
+  unsigned getIssueWidth() const { return SchedModel.IssueWidth; }
+
+  /// \brief Return the number of issue slots required for this MI.
+  unsigned getNumMicroOps(MachineInstr *MI) const;
+
   /// \brief Compute operand latency based on the available machine model.
   ///
   /// Computes and return the latency of the given data dependent def and use
@@ -74,11 +91,20 @@ public:
                                  const MachineInstr *UseMI, unsigned UseOperIdx,
                                  bool FindMin) const;
 
-  /// \brief Identify the processor corresponding to the current subtarget.
-  unsigned getProcessorID() const { return SchedModel.getProcessorID(); }
+  /// \brief Compute the instruction latency based on the available machine
+  /// model.
+  ///
+  /// Compute and return the expected latency of this instruction independent of
+  /// a particular use. computeOperandLatency is the prefered API, but this is
+  /// occasionally useful to help estimate instruction cost.
+  unsigned computeInstrLatency(const MachineInstr *MI) const;
+
+  /// \brief Output dependency latency of a pair of defs of the same register.
+  ///
+  /// This is typically one cycle.
+  unsigned computeOutputLatency(const MachineInstr *DefMI, unsigned DefIdx,
+                                const MachineInstr *DepMI) const;
 
-  /// \brief Maximum number of micro-ops that may be scheduled per cycle.
-  unsigned getIssueWidth() const { return SchedModel.IssueWidth; }
 
 private:
   /// getDefLatency is a helper for computeOperandLatency. Return the