X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=include%2Fllvm%2FCodeGen%2FTargetSchedule.h;h=d2a26afe9995f396ff22c0c34e3cf391162e54b8;hb=131378555816174d3d521506cb2caf962d80e9ba;hp=4cf6f778a6caf00d3ed3b3fbc8b2d868d04c9e83;hpb=99ab6c6035aec3c0e9b0cc5b76a4666fc5fd7b7b;p=oota-llvm.git

diff --git a/include/llvm/CodeGen/TargetSchedule.h b/include/llvm/CodeGen/TargetSchedule.h
index 4cf6f778a6c..d2a26afe999 100644
--- a/include/llvm/CodeGen/TargetSchedule.h
+++ b/include/llvm/CodeGen/TargetSchedule.h
@@ -9,7 +9,7 @@
 //
 // This file defines a wrapper around MCSchedModel that allows the interface to
 // benefit from information currently only available in TargetInstrInfo.
-// Ideally, the scheduling interface would be fully defined in the MC layter.
+// Ideally, the scheduling interface would be fully defined in the MC layer.
 //
 //===----------------------------------------------------------------------===//
 
@@ -45,17 +45,33 @@ public:
   /// Return true if this machine model includes an instruction-level scheduling
   /// model. This is more detailed than the course grain IssueWidth and default
   /// latency properties, but separate from the per-cycle itinerary data.
-  bool hasInstrSchedModel() const {
-    return SchedModel.hasInstrSchedModel();
-  }
+  bool hasInstrSchedModel() const { return SchedModel.hasInstrSchedModel(); }
 
   /// Return true if this machine model includes cycle-to-cycle itinerary
   /// data. This models scheduling at each stage in the processor pipeline.
-  bool hasInstrItineraries() const {
-    return SchedModel.hasInstrItineraries();
-  }
+  bool hasInstrItineraries() const { return !InstrItins.isEmpty(); }
+
+  /// computeOperandLatency - Compute and return the latency of the given data
+  /// dependent def and use when the operand indices are already known. UseMI
+  /// may be NULL for an unknown user.
+  ///
+  /// FindMin may be set to get the minimum vs. expected latency. Minimum
+  /// latency is used for scheduling groups, while expected latency is for
+  /// instruction cost and critical path.
+  unsigned computeOperandLatency(const MachineInstr *DefMI, unsigned DefOperIdx,
+                                 const MachineInstr *UseMI, unsigned UseOperIdx,
+                                 bool FindMin) const;
 
   unsigned getProcessorID() const { return SchedModel.getProcessorID(); }
+
+private:
+  /// getDefLatency is a helper for computeOperandLatency. Return the
+  /// instruction's latency if operand lookup is not required.
+  /// Otherwise return -1.
+  int getDefLatency(const MachineInstr *DefMI, bool FindMin) const;
+
+  /// Return the MCSchedClassDesc for this instruction.
+  const MCSchedClassDesc *resolveSchedClass(const MachineInstr *MI) const;
 };
 
 } // namespace llvm