X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=include%2Fllvm%2FIntrinsicsARM.td;h=e16797ae70d599461f84539196c58fca0209a91b;hb=8cb6626df19ab54531717b419839c2a42d61f180;hp=f1bf37d4d68b14f1d80ec6980af1f63a3f9c9e73;hpb=4dbbfe3571291b9b68bdc81e1eca798b2af7c0c4;p=oota-llvm.git diff --git a/include/llvm/IntrinsicsARM.td b/include/llvm/IntrinsicsARM.td index f1bf37d4d68..e16797ae70d 100644 --- a/include/llvm/IntrinsicsARM.td +++ b/include/llvm/IntrinsicsARM.td @@ -291,26 +291,27 @@ def int_arm_neon_vmovlu : Neon_1Arg_Long_Intrinsic; let TargetPrefix = "arm" in { // De-interleaving vector loads from N-element structures. - def int_arm_neon_vld3i : Intrinsic<[llvm_anyint_ty], - [llvm_ptr_ty], [IntrReadArgMem]>; - def int_arm_neon_vld3f : Intrinsic<[llvm_anyfloat_ty], - [llvm_ptr_ty], [IntrReadArgMem]>; - def int_arm_neon_vld4i : Intrinsic<[llvm_anyint_ty], - [llvm_ptr_ty], [IntrReadArgMem]>; - def int_arm_neon_vld4f : Intrinsic<[llvm_anyfloat_ty], - [llvm_ptr_ty], [IntrReadArgMem]>; + def int_arm_neon_vldi : Intrinsic<[llvm_anyint_ty], + [llvm_ptr_ty, llvm_i32_ty], + [IntrReadArgMem]>; + def int_arm_neon_vldf : Intrinsic<[llvm_anyfloat_ty], + [llvm_ptr_ty, llvm_i32_ty], + [IntrReadArgMem]>; // Interleaving vector stores from N-element structures. - def int_arm_neon_vst3i : Intrinsic<[llvm_void_ty], - [llvm_ptr_ty, llvm_anyint_ty], - [IntrWriteArgMem]>; - def int_arm_neon_vst3f : Intrinsic<[llvm_void_ty], - [llvm_ptr_ty, llvm_anyfloat_ty], - [IntrWriteArgMem]>; - def int_arm_neon_vst4i : Intrinsic<[llvm_void_ty], - [llvm_ptr_ty, llvm_anyint_ty], - [IntrWriteArgMem]>; - def int_arm_neon_vst4f : Intrinsic<[llvm_void_ty], - [llvm_ptr_ty, llvm_anyfloat_ty], - [IntrWriteArgMem]>; + def int_arm_neon_vsti : Intrinsic<[llvm_void_ty], + [llvm_ptr_ty, llvm_anyint_ty, llvm_i32_ty], + [IntrWriteArgMem]>; + def int_arm_neon_vstf : Intrinsic<[llvm_void_ty], + [llvm_ptr_ty, llvm_anyfloat_ty,llvm_i32_ty], + [IntrWriteArgMem]>; + + // Vector Table Lookup + def int_arm_neon_vtbl : Intrinsic<[llvm_v8i8_ty], + [llvm_anyint_ty, llvm_v8i8_ty], + [IntrNoMem]>; + // Vector Table Extension + def int_arm_neon_vtbx : Intrinsic<[llvm_v8i8_ty], + [llvm_v8i8_ty, llvm_anyint_ty, + llvm_v8i8_ty], [IntrNoMem]>; }