X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=include%2Fllvm%2FIntrinsicsCellSPU.td;h=1e311bbecbc6a09859032bd608e9a0b96df12e60;hb=07ea23aa2d17f701fa125442c20c1eba75b55fdb;hp=34d2a82dac4fd4b7f447ac668246c7ca65356b08;hpb=b216a1b0b9847c8ccb917ec8697b6fbaaa915fd6;p=oota-llvm.git diff --git a/include/llvm/IntrinsicsCellSPU.td b/include/llvm/IntrinsicsCellSPU.td index 34d2a82dac4..1e311bbecbc 100644 --- a/include/llvm/IntrinsicsCellSPU.td +++ b/include/llvm/IntrinsicsCellSPU.td @@ -2,7 +2,9 @@ // // The LLVM Compiler Infrastructure // -// This file was developed by The Aerospace Corporation. +// This file is distributed under the University of Illinois Open Source +// Department at The Aerospace Corporation and is distributed under the +// License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // Cell SPU Instructions: @@ -15,84 +17,87 @@ //===----------------------------------------------------------------------===// // 7-bit integer type, used as an immediate: -def cell_i7_ty: LLVMType; // Note: This was i8 -def cell_i8_ty: LLVMType; // Note: This was i8 +def cell_i7_ty: LLVMType; +def cell_i8_ty: LLVMType; + +// Keep this here until it's actually supported: +def llvm_i128_ty : LLVMType; class v16i8_u7imm : GCCBuiltin, - Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, cell_i7_ty], + Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, cell_i7_ty], [IntrNoMem]>; class v16i8_u8imm : GCCBuiltin, - Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i16_ty], + Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i8_ty], [IntrNoMem]>; class v16i8_s10imm : GCCBuiltin, - Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i16_ty], + Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i16_ty], [IntrNoMem]>; class v16i8_u16imm : GCCBuiltin, - Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i16_ty], + Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_i16_ty], [IntrNoMem]>; class v16i8_rr : GCCBuiltin, - Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty], + Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>; class v8i16_s10imm : GCCBuiltin, - Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_i16_ty], + Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_i16_ty], [IntrNoMem]>; class v8i16_u16imm : GCCBuiltin, - Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_i16_ty], + Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_i16_ty], [IntrNoMem]>; class v8i16_rr : GCCBuiltin, - Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty], + Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>; class v4i32_rr : GCCBuiltin, - Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>; class v4i32_u7imm : GCCBuiltin, - Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, cell_i7_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, cell_i7_ty], [IntrNoMem]>; class v4i32_s10imm : GCCBuiltin, - Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_i16_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_i16_ty], [IntrNoMem]>; class v4i32_u16imm : GCCBuiltin, - Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_i16_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_i16_ty], [IntrNoMem]>; class v4f32_rr : GCCBuiltin, - Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty], - [IntrNoMem]>; + Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty], + [IntrNoMem]>; class v4f32_rrr : GCCBuiltin, - Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty], - [IntrNoMem]>; + Intrinsic<[llvm_v4f32_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty], + [IntrNoMem]>; class v2f64_rr : GCCBuiltin, - Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty], - [IntrNoMem]>; - + Intrinsic<[llvm_v2f64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], + [IntrNoMem]>; + // All Cell SPU intrinsics start with "llvm.spu.". let TargetPrefix = "spu" in { def int_spu_si_fsmbi : v8i16_u16imm<"fsmbi">; @@ -112,53 +117,61 @@ let TargetPrefix = "spu" in { def int_spu_si_bgx : v4i32_rr<"bgx">; def int_spu_si_mpy : // This is special: GCCBuiltin<"__builtin_si_mpy">, - Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>; def int_spu_si_mpyu : // This is special: GCCBuiltin<"__builtin_si_mpyu">, - Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>; def int_spu_si_mpyi : // This is special: GCCBuiltin<"__builtin_si_mpyi">, - Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_i16_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_i16_ty], [IntrNoMem]>; def int_spu_si_mpyui : // This is special: GCCBuiltin<"__builtin_si_mpyui">, - Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_i16_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_i16_ty], [IntrNoMem]>; def int_spu_si_mpya : // This is special: GCCBuiltin<"__builtin_si_mpya">, - Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>; def int_spu_si_mpyh : // This is special: GCCBuiltin<"__builtin_si_mpyh">, - Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v8i16_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v8i16_ty], [IntrNoMem]>; def int_spu_si_mpys : // This is special: GCCBuiltin<"__builtin_si_mpys">, - Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>; def int_spu_si_mpyhh : // This is special: GCCBuiltin<"__builtin_si_mpyhh">, - Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>; def int_spu_si_mpyhha : // This is special: GCCBuiltin<"__builtin_si_mpyhha">, - Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>; def int_spu_si_mpyhhu : // This is special: GCCBuiltin<"__builtin_si_mpyhhu">, - Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>; def int_spu_si_mpyhhau : // This is special: GCCBuiltin<"__builtin_si_mpyhhau">, - Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty, llvm_v8i16_ty], + Intrinsic<[llvm_v4i32_ty], [llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>; def int_spu_si_shli: v4i32_u7imm<"shli">; - def int_spu_si_shlqbi: v16i8_rr<"shlqbi">; + + def int_spu_si_shlqbi: + GCCBuiltin, + Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_i32_ty], + [IntrNoMem]>; + def int_spu_si_shlqbii: v16i8_u7imm<"shlqbii">; - def int_spu_si_shlqby: v16i8_rr<"shlqby">; + def int_spu_si_shlqby: + GCCBuiltin, + Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty, llvm_i32_ty], + [IntrNoMem]>; def int_spu_si_shlqbyi: v16i8_u7imm<"shlqbyi">; def int_spu_si_ceq: v4i32_rr<"ceq">; @@ -200,31 +213,30 @@ let TargetPrefix = "spu" in { def int_spu_si_nor: v4i32_rr<"nor">; def int_spu_si_nand: v4i32_rr<"nand">; - def int_spu_si_fa: v4f32_rr<"fa">; - def int_spu_si_fs: v4f32_rr<"fs">; - def int_spu_si_fm: v4f32_rr<"fm">; + def int_spu_si_fa: v4f32_rr<"fa">; + def int_spu_si_fs: v4f32_rr<"fs">; + def int_spu_si_fm: v4f32_rr<"fm">; - def int_spu_si_fceq: v4f32_rr<"fceq">; - def int_spu_si_fcmeq: v4f32_rr<"fcmeq">; - def int_spu_si_fcgt: v4f32_rr<"fcgt">; - def int_spu_si_fcmgt: v4f32_rr<"fcmgt">; + def int_spu_si_fceq: v4f32_rr<"fceq">; + def int_spu_si_fcmeq: v4f32_rr<"fcmeq">; + def int_spu_si_fcgt: v4f32_rr<"fcgt">; + def int_spu_si_fcmgt: v4f32_rr<"fcmgt">; - def int_spu_si_fma: v4f32_rrr<"fma">; - def int_spu_si_fnms: v4f32_rrr<"fnms">; - def int_spu_si_fms: v4f32_rrr<"fms">; + def int_spu_si_fma: v4f32_rrr<"fma">; + def int_spu_si_fnms: v4f32_rrr<"fnms">; + def int_spu_si_fms: v4f32_rrr<"fms">; - def int_spu_si_dfa: v2f64_rr<"dfa">; - def int_spu_si_dfs: v2f64_rr<"dfs">; - def int_spu_si_dfm: v2f64_rr<"dfm">; - -//def int_spu_si_dfceq: v2f64_rr<"dfceq">; -//def int_spu_si_dfcmeq: v2f64_rr<"dfcmeq">; -//def int_spu_si_dfcgt: v2f64_rr<"dfcgt">; -//def int_spu_si_dfcmgt: v2f64_rr<"dfcmgt">; + def int_spu_si_dfa: v2f64_rr<"dfa">; + def int_spu_si_dfs: v2f64_rr<"dfs">; + def int_spu_si_dfm: v2f64_rr<"dfm">; - def int_spu_si_dfnma: v2f64_rr<"dfnma">; - def int_spu_si_dfma: v2f64_rr<"dfma">; - def int_spu_si_dfnms: v2f64_rr<"dfnms">; - def int_spu_si_dfms: v2f64_rr<"dfms">; +//def int_spu_si_dfceq: v2f64_rr<"dfceq">; +//def int_spu_si_dfcmeq: v2f64_rr<"dfcmeq">; +//def int_spu_si_dfcgt: v2f64_rr<"dfcgt">; +//def int_spu_si_dfcmgt: v2f64_rr<"dfcmgt">; + def int_spu_si_dfnma: v2f64_rr<"dfnma">; + def int_spu_si_dfma: v2f64_rr<"dfma">; + def int_spu_si_dfnms: v2f64_rr<"dfnms">; + def int_spu_si_dfms: v2f64_rr<"dfms">; }