X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=include%2Fllvm%2FMC%2FMCRegisterInfo.h;h=6749bdffc2f563fe8e0e7cd5a2e90b694a779562;hb=e1d4a8813427b76c5f59cf5b70a9df734b7e9284;hp=1a154241084607d52269c5e24664aac01456a23c;hpb=cd00ef033cf944fc96a0d06ffcf49cd805fc4ee3;p=oota-llvm.git diff --git a/include/llvm/MC/MCRegisterInfo.h b/include/llvm/MC/MCRegisterInfo.h index 1a154241084..6749bdffc2f 100644 --- a/include/llvm/MC/MCRegisterInfo.h +++ b/include/llvm/MC/MCRegisterInfo.h @@ -111,6 +111,10 @@ struct MCRegisterDesc { uint32_t SubRegs; // Sub-register set, described above uint32_t SuperRegs; // Super-register set, described above + // Offset into MCRI::SubRegIndices of a list of sub-register indices for each + // sub-register in SubRegs. + uint32_t SubRegIndices; + // RegUnits - Points to the list of register units. The low 4 bits holds the // Scale, the high bits hold an offset into DiffLists. See MCRegUnitIterator. uint32_t RegUnits; @@ -147,7 +151,7 @@ private: const MCRegisterClass *Classes; // Pointer to the regclass array unsigned NumClasses; // Number of entries in the array unsigned NumRegUnits; // Number of regunits. - const uint16_t *RegLists; // Pointer to the reglists array + const uint16_t (*RegUnitRoots)[2]; // Pointer to regunit root table. const uint16_t *DiffLists; // Pointer to the difflists array const char *RegStrings; // Pointer to the string table. const uint16_t *SubRegIndices; // Pointer to the subreg lookup @@ -167,25 +171,6 @@ private: DenseMap L2SEHRegs; // LLVM to SEH regs mapping public: - /// RegListIterator. This iterator class is used to traverse lists of - /// super-registers, sub-registers, and overlapping registers. Don't use it - /// directly, use one of the sub-classes defined below. - class RegListIterator { - const uint16_t *Pos; - public: - explicit RegListIterator(const uint16_t *Table) - : Pos(Table) {} - - /// isValid - Return false when the end of the list is reached. - bool isValid() const { return *Pos; } - - /// Dereference the iterator to get the current register. - unsigned operator*() const { return *Pos; } - - /// Pre-increment. Move to the next register. - void operator++() { ++Pos; } - }; - /// DiffListIterator - Base iterator class that can traverse the /// differentially encoded register and regunit lists in DiffLists. /// Don't use this class directly, use one of the specialized sub-classes @@ -232,18 +217,20 @@ public: } }; - // These iterators are allowed to sub-class RegListIterator and - // DiffListIterator and access internal list pointers. + // These iterators are allowed to sub-class DiffListIterator and access + // internal list pointers. friend class MCSubRegIterator; friend class MCSuperRegIterator; friend class MCRegAliasIterator; friend class MCRegUnitIterator; + friend class MCRegUnitRootIterator; /// InitMCRegisterInfo - Initialize MCRegisterInfo, called by TableGen /// auto-generated routines. *DO NOT USE*. void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA, - const MCRegisterClass *C, unsigned NC, unsigned NRU, - const uint16_t *RL, + const MCRegisterClass *C, unsigned NC, + const uint16_t (*RURoots)[2], + unsigned NRU, const uint16_t *DL, const char *Strings, const uint16_t *SubIndices, @@ -253,10 +240,10 @@ public: NumRegs = NR; RAReg = RA; Classes = C; - RegLists = RL; DiffLists = DL; RegStrings = Strings; NumClasses = NC; + RegUnitRoots = RURoots; NumRegUnits = NRU; SubRegIndices = SubIndices; NumSubRegIndices = NumIndices; @@ -319,68 +306,20 @@ public: return operator[](RegNo); } - /// getAliasSet - Return the set of registers aliased by the specified - /// register, or a null list of there are none. The list returned is zero - /// terminated. - /// - const uint16_t *getAliasSet(unsigned RegNo) const { - // The Overlaps set always begins with Reg itself. - return RegLists + get(RegNo).Overlaps + 1; - } - - /// getOverlaps - Return a list of registers that overlap Reg, including - /// itself. This is the same as the alias set except Reg is included in the - /// list. - /// These are exactly the registers in { x | regsOverlap(x, Reg) }. - /// - const uint16_t *getOverlaps(unsigned RegNo) const { - return RegLists + get(RegNo).Overlaps; - } - - /// getSubRegisters - Return the list of registers that are sub-registers of - /// the specified register, or a null list of there are none. The list - /// returned is zero terminated and sorted according to super-sub register - /// relations. e.g. X86::RAX's sub-register list is EAX, AX, AL, AH. - /// - const uint16_t *getSubRegisters(unsigned RegNo) const { - return RegLists + get(RegNo).SubRegs; - } - /// getSubReg - Returns the physical register number of sub-register "Index" /// for physical register RegNo. Return zero if the sub-register does not /// exist. - unsigned getSubReg(unsigned Reg, unsigned Idx) const { - return *(SubRegIndices + (Reg - 1) * NumSubRegIndices + Idx - 1); - } + unsigned getSubReg(unsigned Reg, unsigned Idx) const; /// getMatchingSuperReg - Return a super-register of the specified register /// Reg so its sub-register of index SubIdx is Reg. unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, - const MCRegisterClass *RC) const { - for (const uint16_t *SRs = getSuperRegisters(Reg); unsigned SR = *SRs;++SRs) - if (Reg == getSubReg(SR, SubIdx) && RC->contains(SR)) - return SR; - return 0; - } + const MCRegisterClass *RC) const; /// getSubRegIndex - For a given register pair, return the sub-register index /// if the second register is a sub-register of the first. Return zero /// otherwise. - unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const { - for (unsigned I = 1; I <= NumSubRegIndices; ++I) - if (getSubReg(RegNo, I) == SubRegNo) - return I; - return 0; - } - - /// getSuperRegisters - Return the list of registers that are super-registers - /// of the specified register, or a null list of there are none. The list - /// returned is zero terminated and sorted according to super-sub register - /// relations. e.g. X86::AL's super-register list is AX, EAX, RAX. - /// - const uint16_t *getSuperRegisters(unsigned RegNo) const { - return RegLists + get(RegNo).SuperRegs; - } + unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const; /// getName - Return the human-readable symbolic target-specific name for the /// specified physical register. @@ -394,6 +333,13 @@ public: return NumRegs; } + /// getNumSubRegIndices - Return the number of sub-register indices + /// understood by the target. Index 0 is reserved for the no-op sub-register, + /// while 1 to getNumSubRegIndices() - 1 represent real sub-registers. + unsigned getNumSubRegIndices() const { + return NumSubRegIndices; + } + /// getNumRegUnits - Return the number of (native) register units in the /// target. Register units are numbered from 0 to getNumRegUnits() - 1. They /// can be accessed through MCRegUnitIterator defined below. @@ -405,36 +351,15 @@ public: /// number. Returns -1 if there is no equivalent value. The second /// parameter allows targets to use different numberings for EH info and /// debugging info. - int getDwarfRegNum(unsigned RegNum, bool isEH) const { - const DwarfLLVMRegPair *M = isEH ? EHL2DwarfRegs : L2DwarfRegs; - unsigned Size = isEH ? EHL2DwarfRegsSize : L2DwarfRegsSize; - - DwarfLLVMRegPair Key = { RegNum, 0 }; - const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key); - if (I == M+Size || I->FromReg != RegNum) - return -1; - return I->ToReg; - } + int getDwarfRegNum(unsigned RegNum, bool isEH) const; /// getLLVMRegNum - Map a dwarf register back to a target register. /// - int getLLVMRegNum(unsigned RegNum, bool isEH) const { - const DwarfLLVMRegPair *M = isEH ? EHDwarf2LRegs : Dwarf2LRegs; - unsigned Size = isEH ? EHDwarf2LRegsSize : Dwarf2LRegsSize; - - DwarfLLVMRegPair Key = { RegNum, 0 }; - const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key); - assert(I != M+Size && I->FromReg == RegNum && "Invalid RegNum"); - return I->ToReg; - } + int getLLVMRegNum(unsigned RegNum, bool isEH) const; /// getSEHRegNum - Map a target register to an equivalent SEH register /// number. Returns LLVM register number if there is no equivalent value. - int getSEHRegNum(unsigned RegNum) const { - const DenseMap::const_iterator I = L2SEHRegs.find(RegNum); - if (I == L2SEHRegs.end()) return (int)RegNum; - return I->second; - } + int getSEHRegNum(unsigned RegNum) const; regclass_iterator regclass_begin() const { return Classes; } regclass_iterator regclass_end() const { return Classes+NumClasses; } @@ -467,26 +392,34 @@ public: // aliasing registers. Use these iterator classes to traverse the lists. /// MCSubRegIterator enumerates all sub-registers of Reg. -class MCSubRegIterator : public MCRegisterInfo::RegListIterator { +class MCSubRegIterator : public MCRegisterInfo::DiffListIterator { public: - MCSubRegIterator(unsigned Reg, const MCRegisterInfo *MCRI) - : RegListIterator(MCRI->RegLists + MCRI->get(Reg).SubRegs) {} + MCSubRegIterator(unsigned Reg, const MCRegisterInfo *MCRI) { + init(Reg, MCRI->DiffLists + MCRI->get(Reg).SubRegs); + ++*this; + } }; /// MCSuperRegIterator enumerates all super-registers of Reg. -class MCSuperRegIterator : public MCRegisterInfo::RegListIterator { +class MCSuperRegIterator : public MCRegisterInfo::DiffListIterator { public: - MCSuperRegIterator(unsigned Reg, const MCRegisterInfo *MCRI) - : RegListIterator(MCRI->RegLists + MCRI->get(Reg).SuperRegs) {} + MCSuperRegIterator(unsigned Reg, const MCRegisterInfo *MCRI) { + init(Reg, MCRI->DiffLists + MCRI->get(Reg).SuperRegs); + ++*this; + } }; /// MCRegAliasIterator enumerates all registers aliasing Reg. /// If IncludeSelf is set, Reg itself is included in the list. -class MCRegAliasIterator : public MCRegisterInfo::RegListIterator { +class MCRegAliasIterator : public MCRegisterInfo::DiffListIterator { public: - MCRegAliasIterator(unsigned Reg, const MCRegisterInfo *MCRI, bool IncludeSelf) - : RegListIterator(MCRI->RegLists + MCRI->get(Reg).Overlaps + !IncludeSelf) - {} + MCRegAliasIterator(unsigned Reg, const MCRegisterInfo *MCRI, + bool IncludeSelf) { + init(Reg, MCRI->DiffLists + MCRI->get(Reg).Overlaps); + // Initially, the iterator points to Reg itself. + if (!IncludeSelf) + ++*this; + } }; //===----------------------------------------------------------------------===// @@ -525,6 +458,46 @@ public: } }; +// Each register unit has one or two root registers. The complete set of +// registers containing a register unit is the union of the roots and their +// super-registers. All registers aliasing Unit can be visited like this: +// +// for (MCRegUnitRootIterator RI(Unit, MCRI); RI.isValid(); ++RI) { +// unsigned Root = *RI; +// visit(Root); +// for (MCSuperRegIterator SI(Root, MCRI); SI.isValid(); ++SI) +// visit(*SI); +// } + +/// MCRegUnitRootIterator enumerates the root registers of a register unit. +class MCRegUnitRootIterator { + uint16_t Reg0; + uint16_t Reg1; +public: + MCRegUnitRootIterator(unsigned RegUnit, const MCRegisterInfo *MCRI) { + assert(RegUnit < MCRI->getNumRegUnits() && "Invalid register unit"); + Reg0 = MCRI->RegUnitRoots[RegUnit][0]; + Reg1 = MCRI->RegUnitRoots[RegUnit][1]; + } + + /// Dereference to get the current root register. + unsigned operator*() const { + return Reg0; + } + + /// isValid - Check if the iterator is at the end of the list. + bool isValid() const { + return Reg0; + } + + /// Preincrement to move to the next root register. + void operator++() { + assert(isValid() && "Cannot move off the end of the list."); + Reg0 = Reg1; + Reg1 = 0; + } +}; + } // End llvm namespace #endif