X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FLiveVariables.cpp;h=4cb6a5baefbe061478a434c1511d548ac52891c6;hb=420cdebbcb95f3881ab3518fd3bb670837669e43;hp=79c3192fdfd1481ebdb12614987125f451de5afb;hpb=40a627ddf87fe8e5fe057fba405cc0893cf14e70;p=oota-llvm.git diff --git a/lib/CodeGen/LiveVariables.cpp b/lib/CodeGen/LiveVariables.cpp index 79c3192fdfd..4cb6a5baefb 100644 --- a/lib/CodeGen/LiveVariables.cpp +++ b/lib/CodeGen/LiveVariables.cpp @@ -29,7 +29,7 @@ #include "llvm/CodeGen/LiveVariables.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/Target/MRegisterInfo.h" +#include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" #include "llvm/ADT/DepthFirstIterator.h" @@ -59,10 +59,11 @@ void LiveVariables::VarInfo::dump() const { } } +/// getVarInfo - Get (possibly creating) a VarInfo object for the given vreg. LiveVariables::VarInfo &LiveVariables::getVarInfo(unsigned RegIdx) { - assert(MRegisterInfo::isVirtualRegister(RegIdx) && + assert(TargetRegisterInfo::isVirtualRegister(RegIdx) && "getVarInfo: not a virtual register!"); - RegIdx -= MRegisterInfo::FirstVirtualRegister; + RegIdx -= TargetRegisterInfo::FirstVirtualRegister; if (RegIdx >= VirtRegInfo.size()) { if (RegIdx >= 2*VirtRegInfo.size()) VirtRegInfo.resize(RegIdx*2); @@ -75,37 +76,45 @@ LiveVariables::VarInfo &LiveVariables::getVarInfo(unsigned RegIdx) { return VI; } +/// KillsRegister - Returns true if the machine instruction kills the specified +/// register. bool LiveVariables::KillsRegister(MachineInstr *MI, unsigned Reg) const { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = MI->getOperand(i); + const MachineOperand &MO = MI->getOperand(i); if (MO.isRegister() && MO.isKill()) { - if ((MO.getReg() == Reg) || - (MRegisterInfo::isPhysicalRegister(MO.getReg()) && - MRegisterInfo::isPhysicalRegister(Reg) && - RegInfo->isSubRegister(MO.getReg(), Reg))) + unsigned MOReg = MO.getReg(); + if (MOReg == Reg || + (TargetRegisterInfo::isPhysicalRegister(MOReg) && + TargetRegisterInfo::isPhysicalRegister(Reg) && + RegInfo->isSubRegister(MOReg, Reg))) return true; } } return false; } +/// RegisterDefIsDead - Returns true if the register is dead in this machine +/// instruction. bool LiveVariables::RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = MI->getOperand(i); + const MachineOperand &MO = MI->getOperand(i); if (MO.isRegister() && MO.isDead()) { - if ((MO.getReg() == Reg) || - (MRegisterInfo::isPhysicalRegister(MO.getReg()) && - MRegisterInfo::isPhysicalRegister(Reg) && - RegInfo->isSubRegister(MO.getReg(), Reg))) + unsigned MOReg = MO.getReg(); + if ((MOReg == Reg) || + (TargetRegisterInfo::isPhysicalRegister(MOReg) && + TargetRegisterInfo::isPhysicalRegister(Reg) && + RegInfo->isSubRegister(MOReg, Reg))) return true; } } return false; } +/// ModifiesRegister - Returns true if the machine instruction modifies the +/// register. bool LiveVariables::ModifiesRegister(MachineInstr *MI, unsigned Reg) const { for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = MI->getOperand(i); + const MachineOperand &MO = MI->getOperand(i); if (MO.isRegister() && MO.isDef() && MO.getReg() == Reg) return true; } @@ -119,7 +128,7 @@ void LiveVariables::MarkVirtRegAliveInBlock(VarInfo& VRInfo, unsigned BBNum = MBB->getNumber(); // Check to see if this basic block is one of the killing blocks. If so, - // remove it... + // remove it. for (unsigned i = 0, e = VRInfo.Kills.size(); i != e; ++i) if (VRInfo.Kills[i]->getParent() == MBB) { VRInfo.Kills.erase(VRInfo.Kills.begin()+i); // Erase entry @@ -139,11 +148,12 @@ void LiveVariables::MarkVirtRegAliveInBlock(VarInfo& VRInfo, WorkList.push_back(*PI); } -void LiveVariables::MarkVirtRegAliveInBlock(VarInfo& VRInfo, +void LiveVariables::MarkVirtRegAliveInBlock(VarInfo &VRInfo, MachineBasicBlock *DefBlock, MachineBasicBlock *MBB) { std::vector WorkList; MarkVirtRegAliveInBlock(VRInfo, DefBlock, MBB, WorkList); + while (!WorkList.empty()) { MachineBasicBlock *Pred = WorkList.back(); WorkList.pop_back(); @@ -154,7 +164,7 @@ void LiveVariables::MarkVirtRegAliveInBlock(VarInfo& VRInfo, void LiveVariables::HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB, MachineInstr *MI) { - MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo(); + const MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo(); assert(MRI.getVRegDef(reg) && "Register use before def!"); unsigned BBNum = MBB->getNumber(); @@ -163,9 +173,9 @@ void LiveVariables::HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB, VRInfo.UsedBlocks[BBNum] = true; VRInfo.NumUses++; - // Check to see if this basic block is already a kill block... + // Check to see if this basic block is already a kill block. if (!VRInfo.Kills.empty() && VRInfo.Kills.back()->getParent() == MBB) { - // Yes, this register is killed in this basic block already. Increase the + // Yes, this register is killed in this basic block already. Increase the // live range by updating the kill instruction. VRInfo.Kills.back() = MI; return; @@ -179,86 +189,18 @@ void LiveVariables::HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB, assert(MBB != MRI.getVRegDef(reg)->getParent() && "Should have kill for defblock!"); - // Add a new kill entry for this basic block. - // If this virtual register is already marked as alive in this basic block, - // that means it is alive in at least one of the successor block, it's not - // a kill. + // Add a new kill entry for this basic block. If this virtual register is + // already marked as alive in this basic block, that means it is alive in at + // least one of the successor blocks, it's not a kill. if (!VRInfo.AliveBlocks[BBNum]) VRInfo.Kills.push_back(MI); - // Update all dominating blocks to mark them known live. + // Update all dominating blocks to mark them as "known live". for (MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), E = MBB->pred_end(); PI != E; ++PI) MarkVirtRegAliveInBlock(VRInfo, MRI.getVRegDef(reg)->getParent(), *PI); } -bool LiveVariables::addRegisterKilled(unsigned IncomingReg, MachineInstr *MI, - const MRegisterInfo *RegInfo, - bool AddIfNotFound) { - bool Found = false; - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = MI->getOperand(i); - if (MO.isRegister() && MO.isUse()) { - unsigned Reg = MO.getReg(); - if (!Reg) - continue; - if (Reg == IncomingReg) { - MO.setIsKill(); - Found = true; - break; - } else if (MRegisterInfo::isPhysicalRegister(Reg) && - MRegisterInfo::isPhysicalRegister(IncomingReg) && - RegInfo->isSuperRegister(IncomingReg, Reg) && - MO.isKill()) - // A super-register kill already exists. - Found = true; - } - } - - // If not found, this means an alias of one of the operand is killed. Add a - // new implicit operand if required. - if (!Found && AddIfNotFound) { - MI->addOperand(MachineOperand::CreateReg(IncomingReg, false/*IsDef*/, - true/*IsImp*/,true/*IsKill*/)); - return true; - } - return Found; -} - -bool LiveVariables::addRegisterDead(unsigned IncomingReg, MachineInstr *MI, - const MRegisterInfo *RegInfo, - bool AddIfNotFound) { - bool Found = false; - for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = MI->getOperand(i); - if (MO.isRegister() && MO.isDef()) { - unsigned Reg = MO.getReg(); - if (!Reg) - continue; - if (Reg == IncomingReg) { - MO.setIsDead(); - Found = true; - break; - } else if (MRegisterInfo::isPhysicalRegister(Reg) && - MRegisterInfo::isPhysicalRegister(IncomingReg) && - RegInfo->isSuperRegister(IncomingReg, Reg) && - MO.isDead()) - // There exists a super-register that's marked dead. - return true; - } - } - - // If not found, this means an alias of one of the operand is dead. Add a - // new implicit operand. - if (!Found && AddIfNotFound) { - MI->addOperand(MachineOperand::CreateReg(IncomingReg, true/*IsDef*/, - true/*IsImp*/,false/*IsKill*/, - true/*IsDead*/)); - return true; - } - return Found; -} - void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) { // Turn previous partial def's into read/mod/write. for (unsigned i = 0, e = PhysRegPartDef[Reg].size(); i != e; ++i) { @@ -269,6 +211,7 @@ void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) { true/*IsImp*/,true/*IsKill*/)); Def->addOperand(MachineOperand::CreateReg(Reg,true/*IsDef*/,true/*IsImp*/)); } + PhysRegPartDef[Reg].clear(); // There was an earlier def of a super-register. Add implicit def to that MI. @@ -314,49 +257,70 @@ void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) { } } -bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *RefMI, - SmallSet &SubKills) { +/// addRegisterKills - For all of a register's sub-registers that are killed in +/// other instructions (?), indicate that they are killed in this machine +/// instruction by marking the operand as "killed". (If the machine operand +/// isn't found, add it first.) +void LiveVariables::addRegisterKills(unsigned Reg, MachineInstr *MI, + SmallSet &SubKills) { + if (SubKills.count(Reg) == 0) { + MI->addRegisterKilled(Reg, RegInfo, true); + return; + } + for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg); - unsigned SubReg = *SubRegs; ++SubRegs) { - MachineInstr *LastRef = PhysRegInfo[SubReg]; + unsigned SubReg = *SubRegs; ++SubRegs) + addRegisterKills(SubReg, MI, SubKills); +} + +/// HandlePhysRegKill - The recursive version of HandlePhysRegKill. Returns true +/// if: +/// +/// - The register has no sub-registers and the machine instruction is the +/// last def/use of the register, or +/// - The register has sub-registers and none of them are killed elsewhere. +/// +bool LiveVariables::HandlePhysRegKill(unsigned Reg, const MachineInstr *RefMI, + SmallSet &SubKills) { + const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg); + + for (; unsigned SubReg = *SubRegs; ++SubRegs) { + const MachineInstr *LastRef = PhysRegInfo[SubReg]; + if (LastRef != RefMI || !HandlePhysRegKill(SubReg, RefMI, SubKills)) SubKills.insert(SubReg); } - if (*RegInfo->getImmediateSubRegisters(Reg) == 0) { + if (*SubRegs == 0) { // No sub-registers, just check if reg is killed by RefMI. if (PhysRegInfo[Reg] == RefMI) return true; - } else if (SubKills.empty()) - // None of the sub-registers are killed elsewhere... + } else if (SubKills.empty()) { + // None of the sub-registers are killed elsewhere. return true; - return false; -} - -void LiveVariables::addRegisterKills(unsigned Reg, MachineInstr *MI, - SmallSet &SubKills) { - if (SubKills.count(Reg) == 0) - addRegisterKilled(Reg, MI, RegInfo, true); - else { - for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg); - unsigned SubReg = *SubRegs; ++SubRegs) - addRegisterKills(SubReg, MI, SubKills); } + + return false; } +/// HandlePhysRegKill - Calls the recursive version of HandlePhysRegKill. (See +/// above for details.) bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *RefMI) { SmallSet SubKills; + if (HandlePhysRegKill(Reg, RefMI, SubKills)) { - addRegisterKilled(Reg, RefMI, RegInfo, true); + // This machine instruction kills this register. + RefMI->addRegisterKilled(Reg, RegInfo, true); return true; - } else { - // Some sub-registers are killed by another MI. - for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg); - unsigned SubReg = *SubRegs; ++SubRegs) - addRegisterKills(SubReg, RefMI, SubKills); - return false; } + + // Some sub-registers are killed by another machine instruction. + for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg); + unsigned SubReg = *SubRegs; ++SubRegs) + addRegisterKills(SubReg, RefMI, SubKills); + + return false; } void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) { @@ -365,15 +329,16 @@ void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) { if (PhysRegUsed[Reg]) { if (!HandlePhysRegKill(Reg, LastRef)) { if (PhysRegPartUse[Reg]) - addRegisterKilled(Reg, PhysRegPartUse[Reg], RegInfo, true); + PhysRegPartUse[Reg]->addRegisterKilled(Reg, RegInfo, true); } - } else if (PhysRegPartUse[Reg]) + } else if (PhysRegPartUse[Reg]) { // Add implicit use / kill to last partial use. - addRegisterKilled(Reg, PhysRegPartUse[Reg], RegInfo, true); - else if (LastRef != MI) + PhysRegPartUse[Reg]->addRegisterKilled(Reg, RegInfo, true); + } else if (LastRef != MI) { // Defined, but not used. However, watch out for cases where a super-reg // is also defined on the same MI. - addRegisterDead(Reg, LastRef, RegInfo); + LastRef->addRegisterDead(Reg, RegInfo); + } } for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); @@ -382,14 +347,15 @@ void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) { if (PhysRegUsed[SubReg]) { if (!HandlePhysRegKill(SubReg, LastRef)) { if (PhysRegPartUse[SubReg]) - addRegisterKilled(SubReg, PhysRegPartUse[SubReg], RegInfo, true); + PhysRegPartUse[SubReg]->addRegisterKilled(SubReg, RegInfo, true); } - } else if (PhysRegPartUse[SubReg]) + } else if (PhysRegPartUse[SubReg]) { // Add implicit use / kill to last use of a sub-register. - addRegisterKilled(SubReg, PhysRegPartUse[SubReg], RegInfo, true); - else if (LastRef != MI) + PhysRegPartUse[SubReg]->addRegisterKilled(SubReg, RegInfo, true); + } else if (LastRef != MI) { // This must be a def of the subreg on the same MI. - addRegisterDead(SubReg, LastRef, RegInfo); + LastRef->addRegisterDead(SubReg, RegInfo); + } } } @@ -418,6 +384,7 @@ void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) { PhysRegUsed[Reg] = false; PhysRegPartDef[Reg].clear(); PhysRegPartUse[Reg] = NULL; + for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); unsigned SubReg = *SubRegs; ++SubRegs) { PhysRegInfo[SubReg] = MI; @@ -466,7 +433,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) { // Mark live-in registers as live-in. for (MachineBasicBlock::const_livein_iterator II = MBB->livein_begin(), EE = MBB->livein_end(); II != EE; ++II) { - assert(MRegisterInfo::isPhysicalRegister(*II) && + assert(TargetRegisterInfo::isPhysicalRegister(*II) && "Cannot have a live-in virtual register!"); HandlePhysRegDef(*II, 0); } @@ -486,28 +453,35 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) { // Process all uses... for (unsigned i = 0; i != NumOperandsToProcess; ++i) { - MachineOperand &MO = MI->getOperand(i); + const MachineOperand &MO = MI->getOperand(i); + if (MO.isRegister() && MO.isUse() && MO.getReg()) { - if (MRegisterInfo::isVirtualRegister(MO.getReg())){ - HandleVirtRegUse(MO.getReg(), MBB, MI); - } else if (MRegisterInfo::isPhysicalRegister(MO.getReg()) && - !ReservedRegisters[MO.getReg()]) { - HandlePhysRegUse(MO.getReg(), MI); - } + unsigned MOReg = MO.getReg(); + + if (TargetRegisterInfo::isVirtualRegister(MOReg)) + HandleVirtRegUse(MOReg, MBB, MI); + else if (TargetRegisterInfo::isPhysicalRegister(MOReg) && + !ReservedRegisters[MOReg]) + HandlePhysRegUse(MOReg, MI); } } // Process all defs... for (unsigned i = 0; i != NumOperandsToProcess; ++i) { - MachineOperand &MO = MI->getOperand(i); + const MachineOperand &MO = MI->getOperand(i); + if (MO.isRegister() && MO.isDef() && MO.getReg()) { - if (MRegisterInfo::isVirtualRegister(MO.getReg())) { - VarInfo &VRInfo = getVarInfo(MO.getReg()); - // Defaults to dead - VRInfo.Kills.push_back(MI); - } else if (MRegisterInfo::isPhysicalRegister(MO.getReg()) && - !ReservedRegisters[MO.getReg()]) { - HandlePhysRegDef(MO.getReg(), MI); + unsigned MOReg = MO.getReg(); + + if (TargetRegisterInfo::isVirtualRegister(MOReg)) { + VarInfo &VRInfo = getVarInfo(MOReg); + + if (VRInfo.AliveBlocks.none()) + // If vr is not alive in any block, then defaults to dead. + VRInfo.Kills.push_back(MI); + } else if (TargetRegisterInfo::isPhysicalRegister(MOReg) && + !ReservedRegisters[MOReg]) { + HandlePhysRegDef(MOReg, MI); } } } @@ -521,23 +495,24 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) { SmallVector& VarInfoVec = PHIVarInfo[MBB->getNumber()]; for (SmallVector::iterator I = VarInfoVec.begin(), - E = VarInfoVec.end(); I != E; ++I) { - // Only mark it alive only in the block we are representing. + E = VarInfoVec.end(); I != E; ++I) + // Mark it alive only in the block we are representing. MarkVirtRegAliveInBlock(getVarInfo(*I), MRI.getVRegDef(*I)->getParent(), MBB); - } } // Finally, if the last instruction in the block is a return, make sure to mark // it as using all of the live-out values in the function. if (!MBB->empty() && MBB->back().getDesc().isReturn()) { MachineInstr *Ret = &MBB->back(); + for (MachineRegisterInfo::liveout_iterator I = MF->getRegInfo().liveout_begin(), E = MF->getRegInfo().liveout_end(); I != E; ++I) { - assert(MRegisterInfo::isPhysicalRegister(*I) && + assert(TargetRegisterInfo::isPhysicalRegister(*I) && "Cannot have a live-in virtual register!"); HandlePhysRegUse(*I, Ret); + // Add live-out registers as implicit uses. if (Ret->findRegisterUseOperandIdx(*I) == -1) Ret->addOperand(MachineOperand::CreateReg(*I, false, true)); @@ -553,6 +528,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) { // Clear some states between BB's. These are purely local information. for (unsigned i = 0; i != NumRegs; ++i) PhysRegPartDef[i].clear(); + std::fill(PhysRegInfo, PhysRegInfo + NumRegs, (MachineInstr*)0); std::fill(PhysRegUsed, PhysRegUsed + NumRegs, false); std::fill(PhysRegPartUse, PhysRegPartUse + NumRegs, (MachineInstr*)0); @@ -562,15 +538,18 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) { // VirtRegInfo onto MI's. // for (unsigned i = 0, e1 = VirtRegInfo.size(); i != e1; ++i) - for (unsigned j = 0, e2 = VirtRegInfo[i].Kills.size(); j != e2; ++j) { - if (VirtRegInfo[i].Kills[j] == MRI.getVRegDef(i + - MRegisterInfo::FirstVirtualRegister)) - addRegisterDead(i + MRegisterInfo::FirstVirtualRegister, - VirtRegInfo[i].Kills[j], RegInfo); + for (unsigned j = 0, e2 = VirtRegInfo[i].Kills.size(); j != e2; ++j) + if (VirtRegInfo[i].Kills[j] == + MRI.getVRegDef(i + TargetRegisterInfo::FirstVirtualRegister)) + VirtRegInfo[i] + .Kills[j]->addRegisterDead(i + + TargetRegisterInfo::FirstVirtualRegister, + RegInfo); else - addRegisterKilled(i + MRegisterInfo::FirstVirtualRegister, - VirtRegInfo[i].Kills[j], RegInfo); - } + VirtRegInfo[i] + .Kills[j]->addRegisterKilled(i + + TargetRegisterInfo::FirstVirtualRegister, + RegInfo); // Check to make sure there are no unreachable blocks in the MC CFG for the // function. If so, it is due to a bug in the instruction selector or some @@ -600,7 +579,7 @@ void LiveVariables::instructionChanged(MachineInstr *OldMI, for (unsigned i = 0, e = OldMI->getNumOperands(); i != e; ++i) { MachineOperand &MO = OldMI->getOperand(i); if (MO.isRegister() && MO.getReg() && - MRegisterInfo::isVirtualRegister(MO.getReg())) { + TargetRegisterInfo::isVirtualRegister(MO.getReg())) { unsigned Reg = MO.getReg(); VarInfo &VI = getVarInfo(Reg); if (MO.isDef()) { @@ -620,33 +599,6 @@ void LiveVariables::instructionChanged(MachineInstr *OldMI, } } -/// transferKillDeadInfo - Similar to instructionChanged except it does not -/// update live variables internal data structures. -void LiveVariables::transferKillDeadInfo(MachineInstr *OldMI, - MachineInstr *NewMI, - const MRegisterInfo *RegInfo) { - // If the instruction defines any virtual registers, update the VarInfo, - // kill and dead information for the instruction. - for (unsigned i = 0, e = OldMI->getNumOperands(); i != e; ++i) { - MachineOperand &MO = OldMI->getOperand(i); - if (MO.isRegister() && MO.getReg() && - MRegisterInfo::isVirtualRegister(MO.getReg())) { - unsigned Reg = MO.getReg(); - if (MO.isDef()) { - if (MO.isDead()) { - MO.setIsDead(false); - addRegisterDead(Reg, NewMI, RegInfo); - } - } - if (MO.isKill()) { - MO.setIsKill(false); - addRegisterKilled(Reg, NewMI, RegInfo); - } - } - } -} - - /// removeVirtualRegistersKilled - Remove all killed info for the specified /// instruction. void LiveVariables::removeVirtualRegistersKilled(MachineInstr *MI) { @@ -655,7 +607,7 @@ void LiveVariables::removeVirtualRegistersKilled(MachineInstr *MI) { if (MO.isRegister() && MO.isKill()) { MO.setIsKill(false); unsigned Reg = MO.getReg(); - if (MRegisterInfo::isVirtualRegister(Reg)) { + if (TargetRegisterInfo::isVirtualRegister(Reg)) { bool removed = getVarInfo(Reg).removeKill(MI); assert(removed && "kill not in register's VarInfo?"); } @@ -671,7 +623,7 @@ void LiveVariables::removeVirtualRegistersDead(MachineInstr *MI) { if (MO.isRegister() && MO.isDead()) { MO.setIsDead(false); unsigned Reg = MO.getReg(); - if (MRegisterInfo::isVirtualRegister(Reg)) { + if (TargetRegisterInfo::isVirtualRegister(Reg)) { bool removed = getVarInfo(Reg).removeKill(MI); assert(removed && "kill not in register's VarInfo?"); } @@ -690,6 +642,6 @@ void LiveVariables::analyzePHINodes(const MachineFunction& Fn) { for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end(); BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI) for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2) - PHIVarInfo[BBI->getOperand(i + 1).getMBB()->getNumber()]. - push_back(BBI->getOperand(i).getReg()); + PHIVarInfo[BBI->getOperand(i + 1).getMBB()->getNumber()] + .push_back(BBI->getOperand(i).getReg()); }