X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FLiveVariables.cpp;h=bd845085bbf5ce427f9f4d667582fef74bed2a1a;hb=1c7a848e5488c5b29cc80ccc07df006c5b524955;hp=a7bdbd92ff2dd281b26008c61a1d387289075755;hpb=a894ae130b6e69a367aa691eec7e96973a20e901;p=oota-llvm.git

diff --git a/lib/CodeGen/LiveVariables.cpp b/lib/CodeGen/LiveVariables.cpp
index a7bdbd92ff2..bd845085bbf 100644
--- a/lib/CodeGen/LiveVariables.cpp
+++ b/lib/CodeGen/LiveVariables.cpp
@@ -52,11 +52,9 @@ void LiveVariables::getAnalysisUsage(AnalysisUsage &AU) const {
 
 void LiveVariables::VarInfo::dump() const {
   cerr << "  Alive in blocks: ";
-  for (int i = AliveBlocks.find_first(); i != -1; i = AliveBlocks.find_next(i))
-    cerr << i << ", ";
-  cerr << "  Used in blocks: ";
-  for (int i = UsedBlocks.find_first(); i != -1; i = UsedBlocks.find_next(i))
-    cerr << i << ", ";
+  for (SparseBitVector<>::iterator I = AliveBlocks.begin(),
+           E = AliveBlocks.end(); I != E; ++I)
+    cerr << *I << ", ";
   cerr << "\n  Killed by:";
   if (Kills.empty())
     cerr << " No instructions.\n";
@@ -78,10 +76,7 @@ LiveVariables::VarInfo &LiveVariables::getVarInfo(unsigned RegIdx) {
     else
       VirtRegInfo.resize(2*VirtRegInfo.size());
   }
-  VarInfo &VI = VirtRegInfo[RegIdx];
-  VI.AliveBlocks.resize(MF->getNumBlockIDs());
-  VI.UsedBlocks.resize(MF->getNumBlockIDs());
-  return VI;
+  return VirtRegInfo[RegIdx];
 }
 
 void LiveVariables::MarkVirtRegAliveInBlock(VarInfo& VRInfo,
@@ -100,11 +95,11 @@ void LiveVariables::MarkVirtRegAliveInBlock(VarInfo& VRInfo,
   
   if (MBB == DefBlock) return;  // Terminate recursion
 
-  if (VRInfo.AliveBlocks[BBNum])
+  if (VRInfo.AliveBlocks.test(BBNum))
     return;  // We already know the block is live
 
   // Mark the variable known alive in this bb
-  VRInfo.AliveBlocks[BBNum] = true;
+  VRInfo.AliveBlocks.set(BBNum);
 
   for (MachineBasicBlock::const_pred_reverse_iterator PI = MBB->pred_rbegin(),
          E = MBB->pred_rend(); PI != E; ++PI)
@@ -131,7 +126,6 @@ void LiveVariables::HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,
   unsigned BBNum = MBB->getNumber();
 
   VarInfo& VRInfo = getVarInfo(reg);
-  VRInfo.UsedBlocks[BBNum] = true;
   VRInfo.NumUses++;
 
   // Check to see if this basic block is already a kill block.
@@ -168,7 +162,7 @@ void LiveVariables::HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,
   // Add a new kill entry for this basic block. If this virtual register is
   // already marked as alive in this basic block, that means it is alive in at
   // least one of the successor blocks, it's not a kill.
-  if (!VRInfo.AliveBlocks[BBNum])
+  if (!VRInfo.AliveBlocks.test(BBNum))
     VRInfo.Kills.push_back(MI);
 
   // Update all dominating blocks to mark them as "known live".
@@ -180,7 +174,7 @@ void LiveVariables::HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,
 void LiveVariables::HandleVirtRegDef(unsigned Reg, MachineInstr *MI) {
   VarInfo &VRInfo = getVarInfo(Reg);
 
-  if (VRInfo.AliveBlocks.none())
+  if (VRInfo.AliveBlocks.empty())
     // If vr is not alive in any block, then defaults to dead.
     VRInfo.Kills.push_back(MI);
 }
@@ -248,20 +242,6 @@ void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) {
     }
   }
 
-  // There was an earlier def of a super-register. Add implicit def to that MI.
-  //
-  //   A: EAX = ...
-  //   B: ... = AX
-  //
-  // Add implicit def to A if there isn't a use of AX (or EAX) before B.
-  if (!PhysRegUse[Reg]) {
-    MachineInstr *Def = PhysRegDef[Reg];
-    if (Def && !Def->modifiesRegister(Reg))
-      Def->addOperand(MachineOperand::CreateReg(Reg,
-                                                true  /*IsDef*/,
-                                                true  /*IsImp*/));
-  }
-  
   // Remember this use.
   PhysRegUse[Reg]  = MI;
   for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
@@ -379,12 +359,11 @@ bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *MI) {
     // That is, unless we are currently processing the last reference itself.
     LastRefOrPartRef->addRegisterDead(Reg, TRI, true);
 
-  /* Partial uses. Mark register def dead and add implicit def of
-     sub-registers which are used.
-    FIXME: LiveIntervalAnalysis can't handle this yet!
-    EAX<dead>  = op  AL<imp-def>
-    That is, EAX def is dead but AL def extends pass it.
-    Enable this after live interval analysis is fixed to improve codegen!
+  // Partial uses. Mark register def dead and add implicit def of
+  // sub-registers which are used.
+  // EAX<dead>  = op  AL<imp-def>
+  // That is, EAX def is dead but AL def extends pass it.
+  // Enable this after live interval analysis is fixed to improve codegen!
   else if (!PhysRegUse[Reg]) {
     PhysRegDef[Reg]->addRegisterDead(Reg, TRI, true);
     for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
@@ -397,7 +376,7 @@ bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *MI) {
           PartUses.erase(*SS);
       }
     }
-  } */
+  }
   else
     LastRefOrPartRef->addRegisterKilled(Reg, TRI, true);
   return true;