X-Git-Url: http://demsky.eecs.uci.edu/git/?a=blobdiff_plain;f=lib%2FCodeGen%2FLowerSubregs.cpp;h=e2e68d86713bd2f07aaa2f196c9bbe2a93054316;hb=5ac319ac7125b009adddcc49294d2e040c4a91e5;hp=aaadda1cb1cc119a5f78f38b1315de888284ae89;hpb=d8a46e3a74251989f282ca186893dc90bf48e26d;p=oota-llvm.git

diff --git a/lib/CodeGen/LowerSubregs.cpp b/lib/CodeGen/LowerSubregs.cpp
index aaadda1cb1c..e2e68d86713 100644
--- a/lib/CodeGen/LowerSubregs.cpp
+++ b/lib/CodeGen/LowerSubregs.cpp
@@ -30,10 +30,6 @@ namespace {
       return "Subregister lowering instruction pass";
     }
 
-    void getAnalysisUsage(AnalysisUsage &AU) const {
-      AU.setPreservesAll();
-    }
-
     /// runOnMachineFunction - pass entry point
     bool runOnMachineFunction(MachineFunction&);
     
@@ -113,8 +109,8 @@ bool LowerSubregsInstructionPass::LowerSubregToReg(MachineInstr *MI) {
   DOUT << "subreg: CONVERTING: " << *MI;
 
   // Insert sub-register copy
-  const TargetRegisterClass *TRC0 = TRI.getPhysicalRegisterRegClass(DstSubReg);
-  const TargetRegisterClass *TRC1 = TRI.getPhysicalRegisterRegClass(InsReg);
+  const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg);
+  const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg);
   TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
 
 #ifndef NDEBUG
@@ -153,15 +149,19 @@ bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) {
 
   DOUT << "subreg: CONVERTING: " << *MI;
 
-  // Insert sub-register copy
-  const TargetRegisterClass *TRC0 = TRI.getPhysicalRegisterRegClass(DstSubReg);
-  const TargetRegisterClass *TRC1 = TRI.getPhysicalRegisterRegClass(InsReg);
-  TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
-
+  if (DstSubReg == InsReg) {
+    // No need to insert an identify copy instruction.
+    DOUT << "subreg: eliminated!";
+  } else {
+    // Insert sub-register copy
+    const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg);
+    const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg);
+    TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
 #ifndef NDEBUG
-  MachineBasicBlock::iterator dMI = MI;
-  DOUT << "subreg: " << *(--dMI);
+    MachineBasicBlock::iterator dMI = MI;
+    DOUT << "subreg: " << *(--dMI);
 #endif
+  }
 
   DOUT << "\n";
   MBB->remove(MI);